JPS5730198A - Information processing system - Google Patents
Information processing systemInfo
- Publication number
- JPS5730198A JPS5730198A JP10457780A JP10457780A JPS5730198A JP S5730198 A JPS5730198 A JP S5730198A JP 10457780 A JP10457780 A JP 10457780A JP 10457780 A JP10457780 A JP 10457780A JP S5730198 A JPS5730198 A JP S5730198A
- Authority
- JP
- Japan
- Prior art keywords
- register
- segment
- section
- address
- error
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Storage Device Security (AREA)
- Executing Machine-Instructions (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
PURPOSE:To improve integrity by storing data of the same kind in the same segment and by regarding it as an error that an access address is not in this segment. CONSTITUTION:On the basis of a register number set in the section B of an instruction register RX, the data of a specific base register is read out from a general register 1. In this case, its high-order digit bits are set, as they are, in the section 5-0 of a memory address register 5. To the low-order digit bits, a displacement value D0 set in the section D is added 2. When any carry is not generated at this time, the resulting address is found residing in the same segment. If a carry is generated on the addition 2, that shows that the sum exceeds the segment area, and the result of address calculation has an error.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10457780A JPS5730198A (en) | 1980-07-30 | 1980-07-30 | Information processing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10457780A JPS5730198A (en) | 1980-07-30 | 1980-07-30 | Information processing system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5730198A true JPS5730198A (en) | 1982-02-18 |
Family
ID=14384285
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10457780A Pending JPS5730198A (en) | 1980-07-30 | 1980-07-30 | Information processing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5730198A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59188900A (en) * | 1983-04-12 | 1984-10-26 | Nec Corp | Data processor |
JPS59189458A (en) * | 1983-04-13 | 1984-10-27 | Fujitsu Ltd | Ras information managing system |
JPS6227838A (en) * | 1985-07-29 | 1987-02-05 | Nec Corp | Buffer controller of information processor |
-
1980
- 1980-07-30 JP JP10457780A patent/JPS5730198A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59188900A (en) * | 1983-04-12 | 1984-10-26 | Nec Corp | Data processor |
JPS59189458A (en) * | 1983-04-13 | 1984-10-27 | Fujitsu Ltd | Ras information managing system |
JPS6227838A (en) * | 1985-07-29 | 1987-02-05 | Nec Corp | Buffer controller of information processor |
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