JPS5727492A - Memory cell - Google Patents

Memory cell

Info

Publication number
JPS5727492A
JPS5727492A JP10019480A JP10019480A JPS5727492A JP S5727492 A JPS5727492 A JP S5727492A JP 10019480 A JP10019480 A JP 10019480A JP 10019480 A JP10019480 A JP 10019480A JP S5727492 A JPS5727492 A JP S5727492A
Authority
JP
Japan
Prior art keywords
capacitance
software error
capacitor
memory cell
reduce
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10019480A
Other languages
Japanese (ja)
Other versions
JPS6041464B2 (en
Inventor
Shinichi Kunieda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55100194A priority Critical patent/JPS6041464B2/en
Publication of JPS5727492A publication Critical patent/JPS5727492A/en
Publication of JPS6041464B2 publication Critical patent/JPS6041464B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G11C11/4125—Cells incorporating circuit means for protecting against loss of information

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To reduce the generating rate of software error of static memory, by increasing the node capacity of flip-flop type memory cell efficiently. CONSTITUTION:A gate electode G' consists of parts L and L' in width and the L' is wider than the L. The part L is a transistor part determined from the requirements of circuit design and the L' part is a capacitor for software error countermeasure. Since this capacitor is of gate construction, this part has 5-10 times the capacitance per unit area in comparison with the capacitance between a diffusion layer and a substrate, and between a polycrystal silicon film and an A film. Thus, the required area to the same capacitance can be L'XW'. Then, the capacitance of the node N can be increased, allowing to reduce the software error due to alpha rays.
JP55100194A 1980-07-22 1980-07-22 memory cell Expired JPS6041464B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55100194A JPS6041464B2 (en) 1980-07-22 1980-07-22 memory cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55100194A JPS6041464B2 (en) 1980-07-22 1980-07-22 memory cell

Publications (2)

Publication Number Publication Date
JPS5727492A true JPS5727492A (en) 1982-02-13
JPS6041464B2 JPS6041464B2 (en) 1985-09-17

Family

ID=14267487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55100194A Expired JPS6041464B2 (en) 1980-07-22 1980-07-22 memory cell

Country Status (1)

Country Link
JP (1) JPS6041464B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58208886A (en) * 1982-05-31 1983-12-05 武蔵エンジニアリング株式会社 Surface/back discrimination for sheet paper
JPS61100958A (en) * 1984-10-22 1986-05-19 Nec Corp Semiconductor memory integrated circuit device
JPS61276254A (en) * 1985-05-30 1986-12-06 Nec Corp Mos type semiconductor integrated circuit device
JPH02156672A (en) * 1988-12-09 1990-06-15 Matsushita Electron Corp Semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58208886A (en) * 1982-05-31 1983-12-05 武蔵エンジニアリング株式会社 Surface/back discrimination for sheet paper
JPH0315794B2 (en) * 1982-05-31 1991-03-01 Musashi Eng Kk
JPS61100958A (en) * 1984-10-22 1986-05-19 Nec Corp Semiconductor memory integrated circuit device
JPH0438145B2 (en) * 1984-10-22 1992-06-23 Nippon Electric Co
JPS61276254A (en) * 1985-05-30 1986-12-06 Nec Corp Mos type semiconductor integrated circuit device
JPH02156672A (en) * 1988-12-09 1990-06-15 Matsushita Electron Corp Semiconductor device

Also Published As

Publication number Publication date
JPS6041464B2 (en) 1985-09-17

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