JPS5727476A - Storage device - Google Patents

Storage device

Info

Publication number
JPS5727476A
JPS5727476A JP10077980A JP10077980A JPS5727476A JP S5727476 A JPS5727476 A JP S5727476A JP 10077980 A JP10077980 A JP 10077980A JP 10077980 A JP10077980 A JP 10077980A JP S5727476 A JPS5727476 A JP S5727476A
Authority
JP
Japan
Prior art keywords
word
bits
read
write
selecting means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10077980A
Other languages
Japanese (ja)
Inventor
Masaru Ueki
Fumiaki Seto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10077980A priority Critical patent/JPS5727476A/en
Publication of JPS5727476A publication Critical patent/JPS5727476A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)

Abstract

PURPOSE:To eliminate the useless bits and ensure the effective use of an added storage unit, by providing two different types of specific memory units, a bit selecting means and a read/write means respectively. CONSTITUTION:The 1st memory unit (MU)MEM of M.N words XK bits that can read and write with every word and the 2nd memory unit MU.MEM-A of M words XN.L bits are provided. Each word is selected to the 1st memory MU by the common address signals A0-A11; and each word is selected and at the same time the desired L bits are selected out of the selected word through a selecting means respectively. Furthermore read/write means RCC and WCC are provided via the above-mentioned selecting means to carry out the read/write of each word to the 1st MU and the read/write with every L bits to the 2nd MU respectively.
JP10077980A 1980-07-23 1980-07-23 Storage device Pending JPS5727476A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10077980A JPS5727476A (en) 1980-07-23 1980-07-23 Storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10077980A JPS5727476A (en) 1980-07-23 1980-07-23 Storage device

Publications (1)

Publication Number Publication Date
JPS5727476A true JPS5727476A (en) 1982-02-13

Family

ID=14282945

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10077980A Pending JPS5727476A (en) 1980-07-23 1980-07-23 Storage device

Country Status (1)

Country Link
JP (1) JPS5727476A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6055452A (en) * 1983-08-12 1985-03-30 ローベルト・ボツシユ・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング Method of storing value into computer memory
EP0373594A2 (en) * 1988-12-15 1990-06-20 Sanyo Electric Co., Ltd. Computer memory having its output lines selected for connection to a data bus by the memory address
JPH05204358A (en) * 1992-09-28 1993-08-13 Hitachi Ltd Font controller
JP2002063070A (en) * 2000-08-18 2002-02-28 Fujitsu Ltd Arithmetic unit and method of arithmetic operation

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5295932A (en) * 1976-02-09 1977-08-12 Hitachi Ltd Memory device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5295932A (en) * 1976-02-09 1977-08-12 Hitachi Ltd Memory device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6055452A (en) * 1983-08-12 1985-03-30 ローベルト・ボツシユ・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング Method of storing value into computer memory
EP0373594A2 (en) * 1988-12-15 1990-06-20 Sanyo Electric Co., Ltd. Computer memory having its output lines selected for connection to a data bus by the memory address
JPH05204358A (en) * 1992-09-28 1993-08-13 Hitachi Ltd Font controller
JP2002063070A (en) * 2000-08-18 2002-02-28 Fujitsu Ltd Arithmetic unit and method of arithmetic operation
JP4629198B2 (en) * 2000-08-18 2011-02-09 富士通セミコンダクター株式会社 Arithmetic apparatus and arithmetic method

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