JPS5726430A - Forming method for electrode and wiring layer of semiconductor device - Google Patents

Forming method for electrode and wiring layer of semiconductor device

Info

Publication number
JPS5726430A
JPS5726430A JP10199980A JP10199980A JPS5726430A JP S5726430 A JPS5726430 A JP S5726430A JP 10199980 A JP10199980 A JP 10199980A JP 10199980 A JP10199980 A JP 10199980A JP S5726430 A JPS5726430 A JP S5726430A
Authority
JP
Japan
Prior art keywords
electrode
layer
aluminum
semiconductor device
wiring layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10199980A
Other languages
Japanese (ja)
Inventor
Yoshiki Suzuki
Yaichiro Watakabe
Teruhiko Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10199980A priority Critical patent/JPS5726430A/en
Publication of JPS5726430A publication Critical patent/JPS5726430A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To obtain aluminum electrode and wire of microminiature pattern by coating a mask of high molecular material via a layer of Mo or the like readily forming chloride on an aluminum layer and sequentially etching it with gas plasma including Cl2. CONSTITUTION:An aluminum layer 4 is formed on an SiO2 film 3 exposed at the active layer 2 of a substrate 1. Then, an Mo layer 5 and a resist mask 6 are formed. When it is etched with gas plasma of CCl4:Ar=3:7, the chlorides of Mo and Al are sequentially formed, and no alumina is formed on the aluminum surface. Thus, microminiature electrode and wire patterns can be formed. Cr, Ti, etc. readily forming chloride can be used in addition to the Mo.
JP10199980A 1980-07-24 1980-07-24 Forming method for electrode and wiring layer of semiconductor device Pending JPS5726430A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10199980A JPS5726430A (en) 1980-07-24 1980-07-24 Forming method for electrode and wiring layer of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10199980A JPS5726430A (en) 1980-07-24 1980-07-24 Forming method for electrode and wiring layer of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5726430A true JPS5726430A (en) 1982-02-12

Family

ID=14315507

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10199980A Pending JPS5726430A (en) 1980-07-24 1980-07-24 Forming method for electrode and wiring layer of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5726430A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5934647A (en) * 1982-08-20 1984-02-25 Matsushita Electronics Corp Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5934647A (en) * 1982-08-20 1984-02-25 Matsushita Electronics Corp Manufacture of semiconductor device

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