JPS57207965A - System for expanding memory of electronic computer - Google Patents

System for expanding memory of electronic computer

Info

Publication number
JPS57207965A
JPS57207965A JP56092265A JP9226581A JPS57207965A JP S57207965 A JPS57207965 A JP S57207965A JP 56092265 A JP56092265 A JP 56092265A JP 9226581 A JP9226581 A JP 9226581A JP S57207965 A JPS57207965 A JP S57207965A
Authority
JP
Japan
Prior art keywords
memory
circuits
line
memory group
groups
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56092265A
Other languages
Japanese (ja)
Inventor
Akihiro Kondo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56092265A priority Critical patent/JPS57207965A/en
Publication of JPS57207965A publication Critical patent/JPS57207965A/en
Pending legal-status Critical Current

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  • Microcomputers (AREA)

Abstract

PURPOSE: To easily expand an accessible memory capacity, by installing a flag which controls the possibility of memory accesses corresponding to memory groups.
CONSTITUTION: A data line 2, and address line 3, a writing-reading control line 4 are evenly distributed and connected to each memory group 81W8n. Moreover, FF circuits 101W10n which make only one memory group effective in the course of accessing the memory groups, are installed corresponding to each memory group 81W8n. The output line of the circuits 101W10n forms ANDs together with an element selection control line 5 and AND circuits 91W9n, and the outputs of the circuits 91W9n are given to the memory groups 81W8n. Therefore, only one memory group is accessed from the output of one FF circuit which is the only one which is set to "1" among the FF circuits 101W10n.
COPYRIGHT: (C)1982,JPO&Japio
JP56092265A 1981-06-17 1981-06-17 System for expanding memory of electronic computer Pending JPS57207965A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56092265A JPS57207965A (en) 1981-06-17 1981-06-17 System for expanding memory of electronic computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56092265A JPS57207965A (en) 1981-06-17 1981-06-17 System for expanding memory of electronic computer

Publications (1)

Publication Number Publication Date
JPS57207965A true JPS57207965A (en) 1982-12-20

Family

ID=14049563

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56092265A Pending JPS57207965A (en) 1981-06-17 1981-06-17 System for expanding memory of electronic computer

Country Status (1)

Country Link
JP (1) JPS57207965A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229154A (en) * 1984-04-26 1985-11-14 Sony Corp Bank switching device of memory
JPS62280945A (en) * 1986-05-30 1987-12-05 Fujitsu Ltd Memory system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229154A (en) * 1984-04-26 1985-11-14 Sony Corp Bank switching device of memory
JPS62280945A (en) * 1986-05-30 1987-12-05 Fujitsu Ltd Memory system

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