JPS57204652A - Ais detecting circuit - Google Patents

Ais detecting circuit

Info

Publication number
JPS57204652A
JPS57204652A JP56090583A JP9058381A JPS57204652A JP S57204652 A JPS57204652 A JP S57204652A JP 56090583 A JP56090583 A JP 56090583A JP 9058381 A JP9058381 A JP 9058381A JP S57204652 A JPS57204652 A JP S57204652A
Authority
JP
Japan
Prior art keywords
ais
output
pulse
continuous
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56090583A
Other languages
Japanese (ja)
Inventor
Hiroshi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56090583A priority Critical patent/JPS57204652A/en
Publication of JPS57204652A publication Critical patent/JPS57204652A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/14—Monitoring arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)

Abstract

PURPOSE:To ensure the correct detection of an Alarm Indication Signal (AIS) with a simple constitution of the circuit, by using a NOR gate circuit which produces a pulse of a specific duration and secures an NOR between the clock and the data when the pulse is applied to the input. CONSTITUTION:When a multiplexer detects a fault, the signal of continuous 1 is transmitted to the multiplexers of the groups lower than the multiplexer that detected the fault. An NRZ data of continuous 1 is applied to an input terminal A in the figure, and accordingly a pulse is not delivered from the output of an NOR gate circuit 8. As a result, a pulse is not applied to an input I1, and an output O1, i.e., an output C is set at (0). If the output C defines (0) as the reception of AIS, the output C is set at (0) only when the NRZ data of continuous (1), i.e., the AIS is applied to the terminal A. This means that the circuit has the correct detection of the AIS.
JP56090583A 1981-06-11 1981-06-11 Ais detecting circuit Pending JPS57204652A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56090583A JPS57204652A (en) 1981-06-11 1981-06-11 Ais detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56090583A JPS57204652A (en) 1981-06-11 1981-06-11 Ais detecting circuit

Publications (1)

Publication Number Publication Date
JPS57204652A true JPS57204652A (en) 1982-12-15

Family

ID=14002460

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56090583A Pending JPS57204652A (en) 1981-06-11 1981-06-11 Ais detecting circuit

Country Status (1)

Country Link
JP (1) JPS57204652A (en)

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