JPS57203334A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS57203334A
JPS57203334A JP56090087A JP9008781A JPS57203334A JP S57203334 A JPS57203334 A JP S57203334A JP 56090087 A JP56090087 A JP 56090087A JP 9008781 A JP9008781 A JP 9008781A JP S57203334 A JPS57203334 A JP S57203334A
Authority
JP
Japan
Prior art keywords
terminal
load
inverter
integrated circuit
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56090087A
Other languages
Japanese (ja)
Inventor
Kazuhiro Sakashita
Takeshi Tokuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56090087A priority Critical patent/JPS57203334A/en
Publication of JPS57203334A publication Critical patent/JPS57203334A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To increase the working speed of a titled circuit device without lowering the degree of integeration, by forming a part corresponding to a load transistor TR with two different types of elements, i.e., P and N conductive TRs and thus utilizing the merits of both TRs. CONSTITUTION:A driver N transistor TR1 and a load P-TR2 are connected to an input terminal 11 of an inverter gate circuit, and a load N-TR17 is connected in parallel to the load P-TR2. A drain terminal 4 of the P-TR2 and a source terminal 19 of the N-TR17 are connected to an output terminal 12 of an inverter and a drain terminal 5 of the TR1. Then an inverter input terminal 22 is connected to a gate terminal 20 of the P-TR17, and the input potentials of logic levels H and L are supplied to the terminals 11 and 22. The merits of the element characteristics of both P-TR2 and N-TR17 are utilized. Thus the working of the integrated circuit is increased without lowering the degree of integration, and at the same time a high-level signal is delivered with a low level of power consumption.
JP56090087A 1981-06-08 1981-06-08 Semiconductor integrated circuit device Pending JPS57203334A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56090087A JPS57203334A (en) 1981-06-08 1981-06-08 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56090087A JPS57203334A (en) 1981-06-08 1981-06-08 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS57203334A true JPS57203334A (en) 1982-12-13

Family

ID=13988737

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56090087A Pending JPS57203334A (en) 1981-06-08 1981-06-08 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS57203334A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59216329A (en) * 1983-05-24 1984-12-06 Seiko Epson Corp Level shift circuit
JPS60253093A (en) * 1984-05-30 1985-12-13 Fujitsu Ltd Semiconductor storage device
JPS6285015U (en) * 1985-11-18 1987-05-30
JPS62169359A (en) * 1985-10-17 1987-07-25 ソーン、イーエムアイ、ノース、アメリカ、インコーポレーテッド Cmos input buffer circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52109139A (en) * 1976-03-09 1977-09-13 Tokyo Electric Power Co Inc:The Protective relay device
JPS5442949A (en) * 1977-09-10 1979-04-05 Toshiba Corp Ternary converter circuit
JPS5442948A (en) * 1977-09-10 1979-04-05 Toshiba Corp Ternary converter circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52109139A (en) * 1976-03-09 1977-09-13 Tokyo Electric Power Co Inc:The Protective relay device
JPS5442949A (en) * 1977-09-10 1979-04-05 Toshiba Corp Ternary converter circuit
JPS5442948A (en) * 1977-09-10 1979-04-05 Toshiba Corp Ternary converter circuit

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59216329A (en) * 1983-05-24 1984-12-06 Seiko Epson Corp Level shift circuit
JPH0430765B2 (en) * 1983-05-24 1992-05-22
JPS60253093A (en) * 1984-05-30 1985-12-13 Fujitsu Ltd Semiconductor storage device
JPH0456399B2 (en) * 1984-05-30 1992-09-08 Fujitsu Ltd
JPS62169359A (en) * 1985-10-17 1987-07-25 ソーン、イーエムアイ、ノース、アメリカ、インコーポレーテッド Cmos input buffer circuit
JPS6285015U (en) * 1985-11-18 1987-05-30

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