JPS57203135A - Data transfer system - Google Patents
Data transfer systemInfo
- Publication number
- JPS57203135A JPS57203135A JP56088236A JP8823681A JPS57203135A JP S57203135 A JPS57203135 A JP S57203135A JP 56088236 A JP56088236 A JP 56088236A JP 8823681 A JP8823681 A JP 8823681A JP S57203135 A JPS57203135 A JP S57203135A
- Authority
- JP
- Japan
- Prior art keywords
- data
- signal
- stages
- gate
- bit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
- G06F13/4226—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with asynchronous protocol
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
Abstract
PURPOSE:To detect the completion of data tansfer without using an end code by providing one redundancy bit to each of (m) stages of a serial memory, and then applying an OR signal regarding a strobe signal and a data end signal during data writing operation. CONSTITUTION:To a serial memory 1 wherein (n)-bit data are stored as (m) stages, redundancy bits 2 of one-bit constitution are added as (m) stages. During data writing operation, an input ready signal IR is supplied from the memory 1 to a data transmission side, and input data DI1-DIn and a strobe signal ST are applied to an OR gate 3. The gate 3 supplies a shift-in signal SI to the memory 1 and the input data are shifted to right successively. Once transmitted data are all written, a transfer end signal E is applied to the 1st stage of the bit 2 and the gate 3 to perform right shifting operation. When a shift-out signal SO is applied from a reception side, output data DO1-DOn are sent out and after all the data are outputted, the output of the (m) stages of the bits 2 and an output ready signal OR are applied to an AND gate 4, which supplies an end detection signal ED to the reception side.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56088236A JPS57203135A (en) | 1981-06-10 | 1981-06-10 | Data transfer system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56088236A JPS57203135A (en) | 1981-06-10 | 1981-06-10 | Data transfer system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57203135A true JPS57203135A (en) | 1982-12-13 |
Family
ID=13937220
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56088236A Pending JPS57203135A (en) | 1981-06-10 | 1981-06-10 | Data transfer system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57203135A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6045837A (en) * | 1983-08-23 | 1985-03-12 | Yamatake Honeywell Co Ltd | Data transfer circuit |
JPS6045838A (en) * | 1983-08-23 | 1985-03-12 | Yamatake Honeywell Co Ltd | Data transfer circuit |
JPS60207945A (en) * | 1984-03-30 | 1985-10-19 | Panafacom Ltd | Data transfer control system |
JPS61286955A (en) * | 1985-06-13 | 1986-12-17 | Yokogawa Medical Syst Ltd | Method for transferring data |
JPS6293728A (en) * | 1985-10-18 | 1987-04-30 | Fujitsu Ltd | Fifo memory system |
US7203483B2 (en) | 2001-02-09 | 2007-04-10 | Samsung Electronics Co., Ltd. | Wireless communication apparatus, method thereof and wireless communication system employing the same |
US10066661B2 (en) | 2013-07-17 | 2018-09-04 | Central Corporation | Ball joint and method for manufacturing same |
-
1981
- 1981-06-10 JP JP56088236A patent/JPS57203135A/en active Pending
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6045837A (en) * | 1983-08-23 | 1985-03-12 | Yamatake Honeywell Co Ltd | Data transfer circuit |
JPS6045838A (en) * | 1983-08-23 | 1985-03-12 | Yamatake Honeywell Co Ltd | Data transfer circuit |
JPH0222411B2 (en) * | 1983-08-23 | 1990-05-18 | Yamatake Honeywell Co Ltd | |
JPH0222410B2 (en) * | 1983-08-23 | 1990-05-18 | Yamatake Honeywell Co Ltd | |
JPS60207945A (en) * | 1984-03-30 | 1985-10-19 | Panafacom Ltd | Data transfer control system |
JPS61286955A (en) * | 1985-06-13 | 1986-12-17 | Yokogawa Medical Syst Ltd | Method for transferring data |
JPS6293728A (en) * | 1985-10-18 | 1987-04-30 | Fujitsu Ltd | Fifo memory system |
JPH0479011B2 (en) * | 1985-10-18 | 1992-12-14 | Fujitsu Ltd | |
US7203483B2 (en) | 2001-02-09 | 2007-04-10 | Samsung Electronics Co., Ltd. | Wireless communication apparatus, method thereof and wireless communication system employing the same |
US10066661B2 (en) | 2013-07-17 | 2018-09-04 | Central Corporation | Ball joint and method for manufacturing same |
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