JPS57103547A - Bit word access circuit - Google Patents

Bit word access circuit

Info

Publication number
JPS57103547A
JPS57103547A JP55180071A JP18007180A JPS57103547A JP S57103547 A JPS57103547 A JP S57103547A JP 55180071 A JP55180071 A JP 55180071A JP 18007180 A JP18007180 A JP 18007180A JP S57103547 A JPS57103547 A JP S57103547A
Authority
JP
Japan
Prior art keywords
bit
data
word access
bit word
access circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55180071A
Other languages
Japanese (ja)
Inventor
Itaru Tanimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55180071A priority Critical patent/JPS57103547A/en
Publication of JPS57103547A publication Critical patent/JPS57103547A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To eliminate a process like a shift, etc. with the software and to increase the processing speed, by executing in two steps the writing of each bit by one step of reading/writing of each word plus the read of each bit, respectively. CONSTITUTION:An address converting part 2 is inserted into an address signal line 5 to apply the address signal delivered from a central processor 1 to a data device 4 and at the same time to apply a bit position to a data converting part 3. The part 3 is inserted into a data signal line 6 to transfer the data between the processor 1 and the device 4. Then a word access or a bit access is selected by a BIT signal. In the case of word access, the signals of lines MA0-MA7 are latched by the ARE signal and delivered to lines MB0-MB7, respectively.
JP55180071A 1980-12-19 1980-12-19 Bit word access circuit Pending JPS57103547A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55180071A JPS57103547A (en) 1980-12-19 1980-12-19 Bit word access circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55180071A JPS57103547A (en) 1980-12-19 1980-12-19 Bit word access circuit

Publications (1)

Publication Number Publication Date
JPS57103547A true JPS57103547A (en) 1982-06-28

Family

ID=16076948

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55180071A Pending JPS57103547A (en) 1980-12-19 1980-12-19 Bit word access circuit

Country Status (1)

Country Link
JP (1) JPS57103547A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5916185A (en) * 1982-07-20 1984-01-27 Ricoh Co Ltd Memory access device
JPS6194143A (en) * 1984-10-15 1986-05-13 Matsushita Electric Ind Co Ltd Data transfer device
JPS62217483A (en) * 1986-03-17 1987-09-24 Mitsubishi Electric Corp Memory device
JPS63192170A (en) * 1987-02-05 1988-08-09 Furuno Electric Co Ltd Picture memory circuit
JP2005222519A (en) * 2004-02-09 2005-08-18 Arm Ltd Access to bit value in data word stored in memory

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5199436A (en) * 1975-02-28 1976-09-02 Hitachi Ltd
JPS5199434A (en) * 1975-02-28 1976-09-02 Hitachi Ltd
JPS5528141A (en) * 1978-08-16 1980-02-28 Mitsubishi Electric Corp Memory unit of electronic computer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5199436A (en) * 1975-02-28 1976-09-02 Hitachi Ltd
JPS5199434A (en) * 1975-02-28 1976-09-02 Hitachi Ltd
JPS5528141A (en) * 1978-08-16 1980-02-28 Mitsubishi Electric Corp Memory unit of electronic computer

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5916185A (en) * 1982-07-20 1984-01-27 Ricoh Co Ltd Memory access device
JPS6194143A (en) * 1984-10-15 1986-05-13 Matsushita Electric Ind Co Ltd Data transfer device
JPS62217483A (en) * 1986-03-17 1987-09-24 Mitsubishi Electric Corp Memory device
JPS63192170A (en) * 1987-02-05 1988-08-09 Furuno Electric Co Ltd Picture memory circuit
JP2005222519A (en) * 2004-02-09 2005-08-18 Arm Ltd Access to bit value in data word stored in memory

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