JPS57202747A - Electronic circuit device - Google Patents

Electronic circuit device

Info

Publication number
JPS57202747A
JPS57202747A JP56179481A JP17948181A JPS57202747A JP S57202747 A JPS57202747 A JP S57202747A JP 56179481 A JP56179481 A JP 56179481A JP 17948181 A JP17948181 A JP 17948181A JP S57202747 A JPS57202747 A JP S57202747A
Authority
JP
Japan
Prior art keywords
brazing
conductive pattern
sintered
plating
defect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56179481A
Other languages
Japanese (ja)
Inventor
Shinzo Anazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56179481A priority Critical patent/JPS57202747A/en
Publication of JPS57202747A publication Critical patent/JPS57202747A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To stop brazing flow and get rid of a defect while joining, by brazing circuit elements to one device-mounting region of conductive patterns separated each other on an insulation substrate, and providing an insulator on the substrate to contact with each side of the mounting region and the other conductive pattern. CONSTITUTION:Patterns 2, 2',... of W are formed on an alumina tape 1 to be sintered. Alumina powder to be sintered is pasted and printed thereupon. Layers 1, 1'', 1''',... are provided. The unification is done by sintering under H2 at approximately 1,700 degrees C. Ni plating and Au plating are applied. Electronic devices 3... are capped with Au-Si 4 and Au-Sn 4'. A gold line 5 is connected. According to this constitution, a brazing stopping layer is ceramic of the same quality as an insulation plate. A conductive pattern is ideally protected thermally, chemically and mechanically with high reliability. A defect of brazing overflow can be avoided at the time of mounting devices different in junction temperature and brazing material on the same conductive pattern.
JP56179481A 1981-11-09 1981-11-09 Electronic circuit device Pending JPS57202747A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56179481A JPS57202747A (en) 1981-11-09 1981-11-09 Electronic circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56179481A JPS57202747A (en) 1981-11-09 1981-11-09 Electronic circuit device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP6604773A Division JPS568499B2 (en) 1973-06-12 1973-06-12

Publications (1)

Publication Number Publication Date
JPS57202747A true JPS57202747A (en) 1982-12-11

Family

ID=16066587

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56179481A Pending JPS57202747A (en) 1981-11-09 1981-11-09 Electronic circuit device

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Country Link
JP (1) JPS57202747A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59205730A (en) * 1983-05-09 1984-11-21 Mitsubishi Electric Corp Manufacture of semiconductor device
JPH0383347A (en) * 1989-08-28 1991-04-09 Sumitomo Electric Ind Ltd Integrated circuit device and manufacture thereof
JPH03138953A (en) * 1989-10-23 1991-06-13 Nec Corp High-frequency high-output-power transistor
JPH03248541A (en) * 1990-02-27 1991-11-06 Mitsubishi Electric Corp Semiconductor package

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59205730A (en) * 1983-05-09 1984-11-21 Mitsubishi Electric Corp Manufacture of semiconductor device
JPH0383347A (en) * 1989-08-28 1991-04-09 Sumitomo Electric Ind Ltd Integrated circuit device and manufacture thereof
JPH03138953A (en) * 1989-10-23 1991-06-13 Nec Corp High-frequency high-output-power transistor
JPH03248541A (en) * 1990-02-27 1991-11-06 Mitsubishi Electric Corp Semiconductor package

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