JPS57183181A - Vertical deflecting circuit - Google Patents
Vertical deflecting circuitInfo
- Publication number
- JPS57183181A JPS57183181A JP6917981A JP6917981A JPS57183181A JP S57183181 A JPS57183181 A JP S57183181A JP 6917981 A JP6917981 A JP 6917981A JP 6917981 A JP6917981 A JP 6917981A JP S57183181 A JPS57183181 A JP S57183181A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- capacitor
- turns
- turn
- comparator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Details Of Television Scanning (AREA)
Abstract
PURPOSE:To prevent the generation of lateral white noise on the screen of an image display while preventing interference other circuit blocks, by constituting a circuit in such a way that plural transistors (TR) are not turn on and off in a period other than a blanking period. CONSTITUTION:A signal VA from a vertical oscillating circuit 1 is applied to a flip-flop (F-F)19 through a switching TR16. When the VA is positive, the TR16 turns on, and a TR18, therefore, turns off. At this time, a TR20 turns off and the capacitor 6 of a charging and discharging circuit 7 is charged. When the capacitor 6 is charged up to the 1st reference voltage V2, a comparator 22 outputs a voltage VF and when up to the 2nd reference voltage V1, a comparator 21 operates turn on a resetting TR23 immediately and the FF19 is inverted to turn on the TR20, so that the capacitor 6 is discharged. Said operation is repeated to obtain a blanking signal at an output terminal 13 and a deflection driving pulse at an output terminal 27.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6917981A JPS57183181A (en) | 1981-05-07 | 1981-05-07 | Vertical deflecting circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6917981A JPS57183181A (en) | 1981-05-07 | 1981-05-07 | Vertical deflecting circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57183181A true JPS57183181A (en) | 1982-11-11 |
JPS6250016B2 JPS6250016B2 (en) | 1987-10-22 |
Family
ID=13395231
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6917981A Granted JPS57183181A (en) | 1981-05-07 | 1981-05-07 | Vertical deflecting circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57183181A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05328165A (en) * | 1992-05-20 | 1993-12-10 | Victor Co Of Japan Ltd | Vertical blanking signal generating circuit |
-
1981
- 1981-05-07 JP JP6917981A patent/JPS57183181A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05328165A (en) * | 1992-05-20 | 1993-12-10 | Victor Co Of Japan Ltd | Vertical blanking signal generating circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS6250016B2 (en) | 1987-10-22 |
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