JPS57181215A - Variable gain circuit - Google Patents
Variable gain circuitInfo
- Publication number
- JPS57181215A JPS57181215A JP6596081A JP6596081A JPS57181215A JP S57181215 A JPS57181215 A JP S57181215A JP 6596081 A JP6596081 A JP 6596081A JP 6596081 A JP6596081 A JP 6596081A JP S57181215 A JPS57181215 A JP S57181215A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- voltage
- variable gain
- output
- gain circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G1/00—Details of arrangements for controlling amplification
- H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
- H03G1/0035—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements
- H03G1/0082—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements using bipolar transistor-type devices
Landscapes
- Control Of Amplification And Gain Control (AREA)
Abstract
PURPOSE:To obtain a variable gain circuit suitable for IC-implementation and to reduce the offset voltage of an output by constituting the variable gain circuit so that transistors (TR) as gain control elements all use NPN ones. CONSTITUTION:A signal from a signal input terminal 1 is processed by the voltage-current conversion of an impedance element R1, and the resulting signal is applied to the uninverted input terminal of an amplifier A1. The output of this amplifier A1 is applied to TR circuits Q31-Q34 connected as shown in the figure. A voltage at a connection point between the collector of the 3rd TRQ33 and the emitter of the 4th TRQ34 among said TR circuits is processed by current-voltage conversion through an amplifying circuit A2 and an R2, and the resulting signal is led out to a signal output terminal 2. Then, the ratio of bias currents of the respective TRs is varied in accordance with gain control signals S1-S4 supplied externally, thus controlling the gain.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6596081A JPS57181215A (en) | 1981-04-30 | 1981-04-30 | Variable gain circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6596081A JPS57181215A (en) | 1981-04-30 | 1981-04-30 | Variable gain circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57181215A true JPS57181215A (en) | 1982-11-08 |
JPS6332286B2 JPS6332286B2 (en) | 1988-06-29 |
Family
ID=13302057
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6596081A Granted JPS57181215A (en) | 1981-04-30 | 1981-04-30 | Variable gain circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57181215A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04117710A (en) * | 1990-09-03 | 1992-04-17 | Nec Ic Microcomput Syst Ltd | Gain variable amplifier |
-
1981
- 1981-04-30 JP JP6596081A patent/JPS57181215A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04117710A (en) * | 1990-09-03 | 1992-04-17 | Nec Ic Microcomput Syst Ltd | Gain variable amplifier |
Also Published As
Publication number | Publication date |
---|---|
JPS6332286B2 (en) | 1988-06-29 |
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