JPS57162015A - Common input/output bus controlling system - Google Patents

Common input/output bus controlling system

Info

Publication number
JPS57162015A
JPS57162015A JP4796781A JP4796781A JPS57162015A JP S57162015 A JPS57162015 A JP S57162015A JP 4796781 A JP4796781 A JP 4796781A JP 4796781 A JP4796781 A JP 4796781A JP S57162015 A JPS57162015 A JP S57162015A
Authority
JP
Japan
Prior art keywords
bus switching
buses
input
output
cpus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4796781A
Other languages
Japanese (ja)
Inventor
Yutaka Nakajima
Koji Shida
Atsushi Endo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Engineering Corp
Toshiba Corp
Original Assignee
Toshiba Engineering Corp
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Engineering Corp, Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Engineering Corp
Priority to JP4796781A priority Critical patent/JPS57162015A/en
Publication of JPS57162015A publication Critical patent/JPS57162015A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To execute control which can be extended and changed easily with high reliability, by combining and using plural bus switching modules having the same function and executing the bus switching control of each module, in the common input/output bus control system used for an information processing system. CONSTITUTION:CPUs 1011-101n and input/output devices I/O 1031-103n are connected to input/output buses 1021-102n, respectively. Also, between the CPUs 1011-101n and common input/output buses 1041, 1042 which the CPUs have in common, input/output bus switching circuits 1061, 1062 which contain a bus switching controlling circuit, respectively, and are provided in multistage with tree-like bus switching modules having the same function are placed. By the bus switching control of these circuits 1061, 106n, the buses 1041, 1042 are selectively connected to optional buses of the respective buses 1021-102n of the CPU1- CPUn.
JP4796781A 1981-03-31 1981-03-31 Common input/output bus controlling system Pending JPS57162015A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4796781A JPS57162015A (en) 1981-03-31 1981-03-31 Common input/output bus controlling system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4796781A JPS57162015A (en) 1981-03-31 1981-03-31 Common input/output bus controlling system

Publications (1)

Publication Number Publication Date
JPS57162015A true JPS57162015A (en) 1982-10-05

Family

ID=12790092

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4796781A Pending JPS57162015A (en) 1981-03-31 1981-03-31 Common input/output bus controlling system

Country Status (1)

Country Link
JP (1) JPS57162015A (en)

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