JPS57159317A - Initial set control system for system - Google Patents

Initial set control system for system

Info

Publication number
JPS57159317A
JPS57159317A JP56044844A JP4484481A JPS57159317A JP S57159317 A JPS57159317 A JP S57159317A JP 56044844 A JP56044844 A JP 56044844A JP 4484481 A JP4484481 A JP 4484481A JP S57159317 A JPS57159317 A JP S57159317A
Authority
JP
Japan
Prior art keywords
data
failure
parity error
deletion
way
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56044844A
Other languages
English (en)
Other versions
JPH0119180B2 (ja
Inventor
Takashi Chiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56044844A priority Critical patent/JPS57159317A/ja
Publication of JPS57159317A publication Critical patent/JPS57159317A/ja
Publication of JPH0119180B2 publication Critical patent/JPH0119180B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Direct Current Feeding And Distribution (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
JP56044844A 1981-03-27 1981-03-27 Initial set control system for system Granted JPS57159317A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56044844A JPS57159317A (en) 1981-03-27 1981-03-27 Initial set control system for system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56044844A JPS57159317A (en) 1981-03-27 1981-03-27 Initial set control system for system

Publications (2)

Publication Number Publication Date
JPS57159317A true JPS57159317A (en) 1982-10-01
JPH0119180B2 JPH0119180B2 (ja) 1989-04-10

Family

ID=12702777

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56044844A Granted JPS57159317A (en) 1981-03-27 1981-03-27 Initial set control system for system

Country Status (1)

Country Link
JP (1) JPS57159317A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59111539A (ja) * 1982-12-17 1984-06-27 Fujitsu Ltd 電子計算機システム
JPS60247750A (ja) * 1984-05-23 1985-12-07 Nec Corp システム初期構成制御方式

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59111539A (ja) * 1982-12-17 1984-06-27 Fujitsu Ltd 電子計算機システム
JPH0142008B2 (ja) * 1982-12-17 1989-09-08 Fujitsu Ltd
JPS60247750A (ja) * 1984-05-23 1985-12-07 Nec Corp システム初期構成制御方式

Also Published As

Publication number Publication date
JPH0119180B2 (ja) 1989-04-10

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