JPS57130427A - Etching - Google Patents
EtchingInfo
- Publication number
- JPS57130427A JPS57130427A JP1549281A JP1549281A JPS57130427A JP S57130427 A JPS57130427 A JP S57130427A JP 1549281 A JP1549281 A JP 1549281A JP 1549281 A JP1549281 A JP 1549281A JP S57130427 A JPS57130427 A JP S57130427A
- Authority
- JP
- Japan
- Prior art keywords
- opening
- film
- etching
- substrate
- providing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005530 etching Methods 0.000 title abstract 7
- 239000000758 substrate Substances 0.000 abstract 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 238000009413 insulation Methods 0.000 abstract 2
- 229920002120 photoresistant polymer Polymers 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
PURPOSE:To obtain an opening having an inclination face by a method wherein the opening is formed by initially providing an etching selectively not to pass it through an insulation film and successively providing an etching over the range wider than the foregoing selective etching area when the opening is formed by providing an etching for the insulation film extendedly existing on a substrate or a conductive film. CONSTITUTION:An SiO2 film 202 is formed on an Si substrate 201 wherein circuit elements or the like are formed thereon and an opening is perforated as indicated in the following; the entire area except a desired opening part 203 is covered with a photo resist film 204, the opening 203 not to pass through to the substrate 201 is formed through an etching by utilizing the foregoing photoresist film 204. Thereafter, the film 204 is removed, an etching is performed for the remaining film 202, the opening 203 is passed through until the surface of the substrate 201 is exposed and at the same time the film 202 adjacent to the opening 203 is formed in a predetermined thickness. According to such a constitution, a substantially linear inclined face 205 is formed on the side wall of the opening 203 and it is shaped as suitable for a multilayer wiring.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1549281A JPS57130427A (en) | 1981-02-04 | 1981-02-04 | Etching |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1549281A JPS57130427A (en) | 1981-02-04 | 1981-02-04 | Etching |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57130427A true JPS57130427A (en) | 1982-08-12 |
Family
ID=11890292
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1549281A Pending JPS57130427A (en) | 1981-02-04 | 1981-02-04 | Etching |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57130427A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60160126A (en) * | 1984-01-30 | 1985-08-21 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
-
1981
- 1981-02-04 JP JP1549281A patent/JPS57130427A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60160126A (en) * | 1984-01-30 | 1985-08-21 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
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