JPS57123756A - Demodulating circuit - Google Patents
Demodulating circuitInfo
- Publication number
- JPS57123756A JPS57123756A JP56009415A JP941581A JPS57123756A JP S57123756 A JPS57123756 A JP S57123756A JP 56009415 A JP56009415 A JP 56009415A JP 941581 A JP941581 A JP 941581A JP S57123756 A JPS57123756 A JP S57123756A
- Authority
- JP
- Japan
- Prior art keywords
- output
- timer
- circuit
- sends
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
- H04L27/14—Demodulator circuits; Receiver circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
PURPOSE:To increase a discrimation margin and to obtain a highly reliable demodulation output by discriminating between ''1'' and ''0'' by extracting the fundamental signal of a demodulated signal through an LPF when demodulating a signal processed by frequency shift modulation. CONSTITUTION:The output of a multivibrator 2 is processed by prescribed-time delay 5, the trailing edges of the pulse waveforms of the output 2a of the vibrator 2 and the output 5a of the circuit are detected by differentiators 6 and 7, and the result of OR8 between both differential outputs is inputted to an FF9. A timer 10, on the other hand, monitors an elapse time from the trailing edge of the pulse waveform and sends its output to a timer 11. The timer 11 sends an output 11a when the differential output 12a of a limiter 1 continues for the elapse time, and its differentiated value and the output of the circuit 12 are ORed 14 to apply the result to the other reset terminal of said FF. The output of the FF9 is passed through an LPF3 to send its fundamental wave component to a discriminating circuit 4, which discriminates between ''1'' and ''0'' with a large discrimination margin, thereby obtaining a demodulation output.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56009415A JPS57123756A (en) | 1981-01-23 | 1981-01-23 | Demodulating circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56009415A JPS57123756A (en) | 1981-01-23 | 1981-01-23 | Demodulating circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57123756A true JPS57123756A (en) | 1982-08-02 |
Family
ID=11719748
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56009415A Pending JPS57123756A (en) | 1981-01-23 | 1981-01-23 | Demodulating circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57123756A (en) |
-
1981
- 1981-01-23 JP JP56009415A patent/JPS57123756A/en active Pending
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