JPS57118431A - Controller of digital-to-analog converter - Google Patents
Controller of digital-to-analog converterInfo
- Publication number
- JPS57118431A JPS57118431A JP333881A JP333881A JPS57118431A JP S57118431 A JPS57118431 A JP S57118431A JP 333881 A JP333881 A JP 333881A JP 333881 A JP333881 A JP 333881A JP S57118431 A JPS57118431 A JP S57118431A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- code
- converter
- bits
- output signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
PURPOSE:To realize the high accuracy with a low cost, by obtaining a code to be written into a memory device so as to be suited as much as possible to the ideal characteristics of a D/A converter of a desired number of bits for a D/A converter having a number of bits larger than the number of using bits. CONSTITUTION:A code generator 7 produces an input code of a D/A converter 8 with m bits to be controlled or an m-bit code G which is turned into the memory data of a memory device 6. The converter 8 produces an analog output signal A in accordance with the code G and supplies it to a comparator 9. The signal A is compared with an integral output signal B, and a comparison output signal E is obtained as a result of comparison. The signal E functions as the strobe signal of a latching circuit 5 which latches an n-bit count output D (m>n) when a coincidence is obtained between an analog output signal H and the signal B. A latch output F thus obtained is stored in the device 6 in the form of a memory address and the m-bit code is stored as a memory data respectively.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP333881A JPS57118431A (en) | 1981-01-14 | 1981-01-14 | Controller of digital-to-analog converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP333881A JPS57118431A (en) | 1981-01-14 | 1981-01-14 | Controller of digital-to-analog converter |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57118431A true JPS57118431A (en) | 1982-07-23 |
Family
ID=11554564
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP333881A Pending JPS57118431A (en) | 1981-01-14 | 1981-01-14 | Controller of digital-to-analog converter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57118431A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6315532A (en) * | 1986-07-08 | 1988-01-22 | Yokogawa Electric Corp | D/a converter response test device |
-
1981
- 1981-01-14 JP JP333881A patent/JPS57118431A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6315532A (en) * | 1986-07-08 | 1988-01-22 | Yokogawa Electric Corp | D/a converter response test device |
JPH0446490B2 (en) * | 1986-07-08 | 1992-07-30 | Yokogawa Electric Corp |
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