JPS57116422A - Analog waveform modulating and demodulating circuit - Google Patents
Analog waveform modulating and demodulating circuitInfo
- Publication number
- JPS57116422A JPS57116422A JP198681A JP198681A JPS57116422A JP S57116422 A JPS57116422 A JP S57116422A JP 198681 A JP198681 A JP 198681A JP 198681 A JP198681 A JP 198681A JP S57116422 A JPS57116422 A JP S57116422A
- Authority
- JP
- Japan
- Prior art keywords
- register
- period
- circuit
- opened
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/02—Delta modulation, i.e. one-bit differential modulation
- H03M3/022—Delta modulation, i.e. one-bit differential modulation with adaptable step size, e.g. adaptive delta modulation [ADM]
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
PURPOSE:To decrease the number of elements of an IC and to reduce chip size, by using one arithmetic circuit on time-division basis. CONSTITUTION:One sampling period is divided into timing periods T1,T2 and T3. In the period T1, clocked inverters I1 and I2 are opened by clock pulses CP1 and CP2. Therefore, output data from an interval register 20 for appreciation is inputted to an arithmetic circuit 22, and the absolute value of a value in a register 20 is so decreased that an analog signal oscillates at the amplitude center of an analog output. In the period T2, clocked inverters I3 and I4 are opened by clock pulses CP3 and CP4. Therefore, the output data of a DELTA amount register 21 is applied to the circuit 22 to perform the arithmetic of the DELTA amount. In the period T3, the inverters I3 and I4 are opened by the pulses CP4 and CP1. Therefore, the high-order digit bit outputs of the registers 20 and 21 are supplied to the circuit 22 to increase or decrease the DELTA amount to the value of the register 20.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP198681A JPS57116422A (en) | 1981-01-09 | 1981-01-09 | Analog waveform modulating and demodulating circuit |
US06/335,652 US4532494A (en) | 1981-01-09 | 1981-12-30 | Adaptive delta codec which varies a delta signal in accordance with a characteristic of an input analog signal |
DE8282300050T DE3264340D1 (en) | 1981-01-09 | 1982-01-06 | Circuit for generating a delta value |
EP82300050A EP0056299B1 (en) | 1981-01-09 | 1982-01-06 | Circuit for generating a delta value |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP198681A JPS57116422A (en) | 1981-01-09 | 1981-01-09 | Analog waveform modulating and demodulating circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57116422A true JPS57116422A (en) | 1982-07-20 |
JPS6255736B2 JPS6255736B2 (en) | 1987-11-20 |
Family
ID=11516807
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP198681A Granted JPS57116422A (en) | 1981-01-09 | 1981-01-09 | Analog waveform modulating and demodulating circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57116422A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59161120A (en) * | 1983-02-22 | 1984-09-11 | アメリカン・マイクロシステムズ・インコ−ポレイテッド | Method and device for controlling integral signal cvsd type codec |
JPS61210725A (en) * | 1985-03-14 | 1986-09-18 | Fujitsu Ltd | Differential pcm coding and decoding circuit for multiplex processing |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52100963A (en) * | 1976-02-20 | 1977-08-24 | Hitachi Ltd | 1-bit encoder |
JPS52100964A (en) * | 1976-02-20 | 1977-08-24 | Hitachi Ltd | 1-bit encoder |
-
1981
- 1981-01-09 JP JP198681A patent/JPS57116422A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52100963A (en) * | 1976-02-20 | 1977-08-24 | Hitachi Ltd | 1-bit encoder |
JPS52100964A (en) * | 1976-02-20 | 1977-08-24 | Hitachi Ltd | 1-bit encoder |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59161120A (en) * | 1983-02-22 | 1984-09-11 | アメリカン・マイクロシステムズ・インコ−ポレイテッド | Method and device for controlling integral signal cvsd type codec |
JPH0444850B2 (en) * | 1983-02-22 | 1992-07-23 | Amerikan Maikuro Shisutemusu Inc | |
JPS61210725A (en) * | 1985-03-14 | 1986-09-18 | Fujitsu Ltd | Differential pcm coding and decoding circuit for multiplex processing |
Also Published As
Publication number | Publication date |
---|---|
JPS6255736B2 (en) | 1987-11-20 |
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