JPS57111132A - Disturbing wave rejecting and receiving system - Google Patents
Disturbing wave rejecting and receiving systemInfo
- Publication number
- JPS57111132A JPS57111132A JP55188705A JP18870580A JPS57111132A JP S57111132 A JPS57111132 A JP S57111132A JP 55188705 A JP55188705 A JP 55188705A JP 18870580 A JP18870580 A JP 18870580A JP S57111132 A JPS57111132 A JP S57111132A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- disturbing wave
- received
- wave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
- H04B1/12—Neutralising, balancing, or compensation arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Noise Elimination (AREA)
- Radio Transmission System (AREA)
Abstract
PURPOSE:To remarkably reduce the probability causing communication impossibility due to disturbance, by constituting so that an output of an AGC circuit, received by a subantenna whose amplitude and phase have been controlled is subtracted from an output of the AGC circuit received by a main antenna. CONSTITUTION:A desired wave S1 and a disturbing wave X1, received by a main antenna 1, and a desired wave S2 and a disturbing wave X2, received by a subantenna 2 are provided to receiving frequency converting parts 4 and 5. An intermediate frequency outputs s1+x1 and s2+x2, outputted from the converting parts 4 and 5 are provided to AGC circuits 7 and 8, respectively. An output of the circuit 7 is provided to a subtracting circuit 9. On the other hand, as for an output of the circuit, its amplitude and phase are controlled by a control signal (a) in an amplitude and phase controlling circuit 10, and after that, said output is subtracted from the output of the circuit 7 in the circuit 9. In this way, the output of the circuit 7 is demodulated by a demodulating part 11 after the disturbing wave has been rejected. In this regard, a disturbing wave reproducing part 12 reproduces a disturbing wave contained in an output of the demodulating part 11, and provides it to a correlation operating part 13. The operating part 13 detects correlation of outputs of the circuit 8 and the reproducing part 12, and generates the signal (a).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55188705A JPS57111132A (en) | 1980-12-26 | 1980-12-26 | Disturbing wave rejecting and receiving system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55188705A JPS57111132A (en) | 1980-12-26 | 1980-12-26 | Disturbing wave rejecting and receiving system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57111132A true JPS57111132A (en) | 1982-07-10 |
JPS6216581B2 JPS6216581B2 (en) | 1987-04-13 |
Family
ID=16228359
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55188705A Granted JPS57111132A (en) | 1980-12-26 | 1980-12-26 | Disturbing wave rejecting and receiving system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57111132A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62147818A (en) * | 1985-12-23 | 1987-07-01 | Nippon Telegr & Teleph Corp <Ntt> | Interference compensation circuit |
WO1988003340A1 (en) * | 1986-10-22 | 1988-05-05 | Kokusai Denshin Denwa Co., Ltd. | System for suppressing interfering waves |
JPH01246908A (en) * | 1988-03-29 | 1989-10-02 | Nec Corp | Automatic gain controlling amplifier |
JP2011199649A (en) * | 2010-03-19 | 2011-10-06 | Nec Corp | Interference wave eliminating apparatus and method of eliminate interference wave |
US8345807B2 (en) | 2008-05-09 | 2013-01-01 | Panasonic Corporation | Demodulation device |
JP2013115548A (en) * | 2011-11-28 | 2013-06-10 | Nippon Telegr & Teleph Corp <Ntt> | Radio communication device |
-
1980
- 1980-12-26 JP JP55188705A patent/JPS57111132A/en active Granted
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62147818A (en) * | 1985-12-23 | 1987-07-01 | Nippon Telegr & Teleph Corp <Ntt> | Interference compensation circuit |
WO1988003340A1 (en) * | 1986-10-22 | 1988-05-05 | Kokusai Denshin Denwa Co., Ltd. | System for suppressing interfering waves |
JPH01246908A (en) * | 1988-03-29 | 1989-10-02 | Nec Corp | Automatic gain controlling amplifier |
US8345807B2 (en) | 2008-05-09 | 2013-01-01 | Panasonic Corporation | Demodulation device |
JP2011199649A (en) * | 2010-03-19 | 2011-10-06 | Nec Corp | Interference wave eliminating apparatus and method of eliminate interference wave |
JP2013115548A (en) * | 2011-11-28 | 2013-06-10 | Nippon Telegr & Teleph Corp <Ntt> | Radio communication device |
Also Published As
Publication number | Publication date |
---|---|
JPS6216581B2 (en) | 1987-04-13 |
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