JPS57106931A - Monitoring device for input and output controller - Google Patents

Monitoring device for input and output controller

Info

Publication number
JPS57106931A
JPS57106931A JP55183558A JP18355880A JPS57106931A JP S57106931 A JPS57106931 A JP S57106931A JP 55183558 A JP55183558 A JP 55183558A JP 18355880 A JP18355880 A JP 18355880A JP S57106931 A JPS57106931 A JP S57106931A
Authority
JP
Japan
Prior art keywords
controller
fault
input
processor
rewriting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55183558A
Other languages
Japanese (ja)
Inventor
Masami Wakabayashi
Toyokazu Nagahara
Hiroyuki Tsujita
Kazuhiko Momoi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55183558A priority Critical patent/JPS57106931A/en
Publication of JPS57106931A publication Critical patent/JPS57106931A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Hardware Redundancy (AREA)

Abstract

PURPOSE:To monitor and rewrite a control storage without stopping the execution of an input and output controller, by checking and rewriting the contents of the control storage at constant intervals of time by a monitoring processor. CONSTITUTION:While an input and output controller 2 is in operation a monitoring processor 1 reads the contents of a control storage CS22 at contact intervals of time and checks them by collation with the previously stored contents of an auxiliary storage device 11 to detect a fault. If some fault is detected, or when it is informed by the controller 2 that a parity error occurs in the CS22, the processor 1 checks which part of the CS22 the error occurs at, and rewrite data in the error occurrence address to discriminate whether hardware causes the error or not. When the rewriting is done normally, the processor 1 sends a fault signal 4, and the controller 2 sends a disconnection request signal to a channel 3. The controller 2 maintains the fault state to enable the monitoring and rewriting of the CS22.
JP55183558A 1980-12-24 1980-12-24 Monitoring device for input and output controller Pending JPS57106931A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55183558A JPS57106931A (en) 1980-12-24 1980-12-24 Monitoring device for input and output controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55183558A JPS57106931A (en) 1980-12-24 1980-12-24 Monitoring device for input and output controller

Publications (1)

Publication Number Publication Date
JPS57106931A true JPS57106931A (en) 1982-07-03

Family

ID=16137897

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55183558A Pending JPS57106931A (en) 1980-12-24 1980-12-24 Monitoring device for input and output controller

Country Status (1)

Country Link
JP (1) JPS57106931A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05233479A (en) * 1992-02-19 1993-09-10 Nec Corp Panel monitor system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05233479A (en) * 1992-02-19 1993-09-10 Nec Corp Panel monitor system

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