JPS57105055A - Main storage access system - Google Patents
Main storage access systemInfo
- Publication number
- JPS57105055A JPS57105055A JP18123380A JP18123380A JPS57105055A JP S57105055 A JPS57105055 A JP S57105055A JP 18123380 A JP18123380 A JP 18123380A JP 18123380 A JP18123380 A JP 18123380A JP S57105055 A JPS57105055 A JP S57105055A
- Authority
- JP
- Japan
- Prior art keywords
- given
- storage
- controller
- access
- queuing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Abstract
PURPOSE:To increase the using efficency of a storage access controller without using a quick machine cycle, by eliminating the queuing for an access request which is given from a storage controller to a storage access controller. CONSTITUTION:An address signal, i.e. an access request which is given from a storage controller is applied to a register 12-1 as well as to a register 11 that works on a machine clock having a half-cycle shift of phase in comparison with the register 12-1. Thus the continuous addresses are held at the registers 12-1 and 12-2 respectively with no queuing. The addresses given from the registers 12-1 and 12-2 are switched by selectors 13-1 and 13-2 to be supplied to storage access controllers 2-1 and 2-2 respectively. The outputs of the controllers 2-1 and 2-2 are stored to main storage devices 3-1 and 3-2, and the outputs of the devices 3-1 and 3-2 are read through selectors 14-1 and 14-2. Thus no queuing is given to the continuous access requests which are given from the storage controller.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18123380A JPS57105055A (en) | 1980-12-23 | 1980-12-23 | Main storage access system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18123380A JPS57105055A (en) | 1980-12-23 | 1980-12-23 | Main storage access system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57105055A true JPS57105055A (en) | 1982-06-30 |
JPS612973B2 JPS612973B2 (en) | 1986-01-29 |
Family
ID=16097123
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18123380A Granted JPS57105055A (en) | 1980-12-23 | 1980-12-23 | Main storage access system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57105055A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60147861A (en) * | 1983-12-30 | 1985-08-03 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Data processing system |
-
1980
- 1980-12-23 JP JP18123380A patent/JPS57105055A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60147861A (en) * | 1983-12-30 | 1985-08-03 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Data processing system |
Also Published As
Publication number | Publication date |
---|---|
JPS612973B2 (en) | 1986-01-29 |
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