JPS5443630A - Memory access control system - Google Patents

Memory access control system

Info

Publication number
JPS5443630A
JPS5443630A JP10986977A JP10986977A JPS5443630A JP S5443630 A JPS5443630 A JP S5443630A JP 10986977 A JP10986977 A JP 10986977A JP 10986977 A JP10986977 A JP 10986977A JP S5443630 A JPS5443630 A JP S5443630A
Authority
JP
Japan
Prior art keywords
counter
output
inputted
make
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10986977A
Other languages
Japanese (ja)
Inventor
Shozo Satake
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10986977A priority Critical patent/JPS5443630A/en
Publication of JPS5443630A publication Critical patent/JPS5443630A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To make it possible to make right-in fast-out memory into hardware by using a binary counter which counts up or down with clock signals and by employing its output as the address information of a RAM element. CONSTITUTION:The output of binary counter 1 which counts up or down by being supplied with counter-up clock 12, counter-down clock 13 and master reset signal 11 is used for assigning the address of MAM element 2. To write data to element 2, reset signal 11 is inputted in order to make output 18 of counter 1 zero, clock 12 is inputted to counter 1 to make the lowest-digit bit high in level, and then, data 16 to be stored is inputted. To read data from element 2, on the other hand, data assigned by the contents of counter 1 is read out to output circuit 3 and signal 15 is inputted, thereby obtaining output signal 17 through output circuit 3.
JP10986977A 1977-09-14 1977-09-14 Memory access control system Pending JPS5443630A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10986977A JPS5443630A (en) 1977-09-14 1977-09-14 Memory access control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10986977A JPS5443630A (en) 1977-09-14 1977-09-14 Memory access control system

Publications (1)

Publication Number Publication Date
JPS5443630A true JPS5443630A (en) 1979-04-06

Family

ID=14521252

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10986977A Pending JPS5443630A (en) 1977-09-14 1977-09-14 Memory access control system

Country Status (1)

Country Link
JP (1) JPS5443630A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2509892A1 (en) * 1981-07-16 1983-01-21 Ampex SELECTIVE COMPLEMENTATION DATA MEMORY AND METHOD FOR USING SAID MEMORY
JPS5862884A (en) * 1981-10-08 1983-04-14 Nec Corp Data processing system
JPS5856399U (en) * 1981-10-11 1983-04-16 株式会社ケンウッド backup storage device
US4393482A (en) * 1979-11-08 1983-07-12 Ricoh Company, Ltd. Shift register
JPH01269293A (en) * 1987-04-10 1989-10-26 Tandem Comput Inc Stack with single encoded stack point
FR2656438A1 (en) * 1989-12-25 1991-06-28 Nec Corp Device for rewriting a control memory

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4393482A (en) * 1979-11-08 1983-07-12 Ricoh Company, Ltd. Shift register
FR2509892A1 (en) * 1981-07-16 1983-01-21 Ampex SELECTIVE COMPLEMENTATION DATA MEMORY AND METHOD FOR USING SAID MEMORY
JPS5862884A (en) * 1981-10-08 1983-04-14 Nec Corp Data processing system
JPS6232556B2 (en) * 1981-10-08 1987-07-15 Nippon Electric Co
JPS5856399U (en) * 1981-10-11 1983-04-16 株式会社ケンウッド backup storage device
JPH01269293A (en) * 1987-04-10 1989-10-26 Tandem Comput Inc Stack with single encoded stack point
FR2656438A1 (en) * 1989-12-25 1991-06-28 Nec Corp Device for rewriting a control memory

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