JPS5694763A - Manufacturing method of transistor - Google Patents

Manufacturing method of transistor

Info

Publication number
JPS5694763A
JPS5694763A JP17117779A JP17117779A JPS5694763A JP S5694763 A JPS5694763 A JP S5694763A JP 17117779 A JP17117779 A JP 17117779A JP 17117779 A JP17117779 A JP 17117779A JP S5694763 A JPS5694763 A JP S5694763A
Authority
JP
Japan
Prior art keywords
lead
transistor
package material
plane
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17117779A
Other languages
Japanese (ja)
Inventor
Tsugio Murayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP17117779A priority Critical patent/JPS5694763A/en
Publication of JPS5694763A publication Critical patent/JPS5694763A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To enable an automatic direction selection as well as to easily make a supply to a package material and a picking out from the package material by a method wherein a projection length of a lead in mutually opposite directions is set to be different in cutting off of the lead of a transistor. CONSTITUTION:A transistor wherein two of three leads are arranged in parallel and protrude from one plane of a sealing outer shell 1 and one lead protrudes from a plane opposed to this plane is cut off from a frame 5 at the point indicated by a dotted line. And then, the cut-off of the lead is performed so that a protruding length L1' of the 1st lead 2 may be larger than a protruding length L2' of the 2nd and 3rd leads 3, 4. And thereafter, this transistor is placed on a parts feeder and based on the difference of the L1' and the L2', a direction selection is automatically performed, and as a result, a containing to a magazine is easily performed. Namely, through this, an automation of a supply to the package material and picking-out from the package material can be easily performed.
JP17117779A 1979-12-28 1979-12-28 Manufacturing method of transistor Pending JPS5694763A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17117779A JPS5694763A (en) 1979-12-28 1979-12-28 Manufacturing method of transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17117779A JPS5694763A (en) 1979-12-28 1979-12-28 Manufacturing method of transistor

Publications (1)

Publication Number Publication Date
JPS5694763A true JPS5694763A (en) 1981-07-31

Family

ID=15918419

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17117779A Pending JPS5694763A (en) 1979-12-28 1979-12-28 Manufacturing method of transistor

Country Status (1)

Country Link
JP (1) JPS5694763A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4556896A (en) * 1982-08-30 1985-12-03 International Rectifier Corporation Lead frame structure
US5760467A (en) * 1991-09-19 1998-06-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor device lead frame having sunk die pad portions

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4556896A (en) * 1982-08-30 1985-12-03 International Rectifier Corporation Lead frame structure
US5760467A (en) * 1991-09-19 1998-06-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor device lead frame having sunk die pad portions

Similar Documents

Publication Publication Date Title
EP0034729A3 (en) Process for the manufacture of an a iii b v semiconductor arrangement and semiconductor device made by this process
FR2283823A1 (en) AUTOMATIC PROCESS AND MACHINE FOR MANUFACTURING HERMETIC PACKAGING
DE3174374D1 (en) Process for fabricating a high speed bipolar transistor
JPS5694763A (en) Manufacturing method of transistor
JPS5254594A (en) Packing method
JPS55103753A (en) Electronic component
JPS5326667A (en) Clamp chip of wire bonder
JPS52103089A (en) Punching method of goods having based through hole and punching device of goods
JPS5381076A (en) Lroduction of resin seal semiconductor device
JPS5237182A (en) Packaging process
JPS5380970A (en) Manufacture of resin shield type semiconductor device
JPS52112178A (en) Automatic insertion of materials
JPS53108778A (en) Transistor
JPS53100088A (en) Method of packaging articles
JPS5546573A (en) Electrode member for light emission device, method of fabricating the same and punch therefor
JPS5324191A (en) Cutter
JPS56100454A (en) Manufacture of semiconductor device
JPS5340398A (en) Method of feeding pads
JPS53102183A (en) Method of packaging plastic lens for sunglasses or sight correction glasses
JPS5355968A (en) Manufcture of semiconductor
JPS52129094A (en) Method of feeding wire in wire cut electrospark machining
JPS5349949A (en) Pellet bonding method
JPS5311577A (en) Soldering method for wafers of semiconductor devices
JPS5246770A (en) Method of assembling semiconductor device and lead frame used for same
JPS53149499A (en) Method of controlling hoop material in bundling device