JPS5691550A - Multiplex transmitter - Google Patents

Multiplex transmitter

Info

Publication number
JPS5691550A
JPS5691550A JP16884979A JP16884979A JPS5691550A JP S5691550 A JPS5691550 A JP S5691550A JP 16884979 A JP16884979 A JP 16884979A JP 16884979 A JP16884979 A JP 16884979A JP S5691550 A JPS5691550 A JP S5691550A
Authority
JP
Japan
Prior art keywords
frame
respective channels
generating circuit
time slot
frame pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16884979A
Other languages
Japanese (ja)
Inventor
Akira Takeyama
Akimasa Yatsuhoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16884979A priority Critical patent/JPS5691550A/en
Publication of JPS5691550A publication Critical patent/JPS5691550A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605—Fixed allocated frame structures
    • H04J3/1623—Plesiochronous digital hierarchy [PDH]
    • H04J3/1629—Format building algorithm

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To make it possible to use a time-division multiplex transmitter universally, by setting a time slot of random length at a random position in a frame, by freely fixing a frame pattern and bit position. CONSTITUTION:At the transmission side of the multiplex transmitter, input signals 61-81 from respective channels are stored in buffer memories 65-85 temporarily with clocks 60-80 indicating transmission speeds of respective channels, and on the basis of clock 11 from clock generating circuit 1 and frame synchronizing signal sending signal 21 from frame pattern generating circuit 2, time slot setting circuits 5, 7 and 8 generate slot position signals 62-82 for the signals of respective channels with prescribed time slots and then send them to multiplexing circuit 3. Simultaneously, they are inputted to memories 65-85 and at assigned time slot positions, they are read out respectively and sent to multiplexing circuit 3, which transmits each readout signal to multiplex transmission line 4 with a synchronizing signal, etc., from frame pattern generating circuit 2.
JP16884979A 1979-12-25 1979-12-25 Multiplex transmitter Pending JPS5691550A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16884979A JPS5691550A (en) 1979-12-25 1979-12-25 Multiplex transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16884979A JPS5691550A (en) 1979-12-25 1979-12-25 Multiplex transmitter

Publications (1)

Publication Number Publication Date
JPS5691550A true JPS5691550A (en) 1981-07-24

Family

ID=15875673

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16884979A Pending JPS5691550A (en) 1979-12-25 1979-12-25 Multiplex transmitter

Country Status (1)

Country Link
JP (1) JPS5691550A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02288627A (en) * 1989-04-28 1990-11-28 Nec Corp Multiplexing system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02288627A (en) * 1989-04-28 1990-11-28 Nec Corp Multiplexing system

Similar Documents

Publication Publication Date Title
GB1378811A (en) Synchronous programmable mixed format time division multiplexer
JPS5639694A (en) Method and device for synchrnonizing timing in transmission of digital information signal
GB1047639A (en) Improvements in or relating to time division transmission systems
GB1273609A (en) A time division multiplex communication system
JPS5468337A (en) Signal transmission system for teaching machine
ES371100A1 (en) Digital information transfer system having integrity check
DE3374255D1 (en) Synchronous clock producing circuit for a digital signal multiplex apparatus
GB1560306A (en) System for providing a clock signal
JPS5691550A (en) Multiplex transmitter
CA997489A (en) Time slot automatic distributor in a multiplex system for telegraph or data signal transmission
JPS5298437A (en) Asynchronous signal retiming circuit for data transmission system
ES363941A2 (en) Repeater station for information signals containing pseudo-random auxiliary signals
FR2315736A1 (en) Transmission system for periodic signals - includes master clock circuit using two main oscillators and auxiliary oscillators
JPS57112148A (en) System for multiplexing digital signal
JPS53115120A (en) Intra-office phase synchronous system
CH505513A (en) Circuit arrangement for compensating for changes in transit time in the transmission of PCM time-division multiplex message signals to a PCM message signal receiving station
JPS5730489A (en) Time-division memory system
SU815911A1 (en) Multichannel switching device
JPS57142064A (en) Network test system
SU773931A1 (en) Multi-channel switching device
SU898614A2 (en) Multichannel switching device
JPS57180244A (en) Multiplexing system
JPS5321511A (en) Digital signal processing system
JPS5289344A (en) Data collecting and transmitting system
GB1334234A (en) Multiplexing