JPS5673426A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5673426A
JPS5673426A JP15032379A JP15032379A JPS5673426A JP S5673426 A JPS5673426 A JP S5673426A JP 15032379 A JP15032379 A JP 15032379A JP 15032379 A JP15032379 A JP 15032379A JP S5673426 A JPS5673426 A JP S5673426A
Authority
JP
Japan
Prior art keywords
substrate
yield rate
crystal defects
main surface
noncrystalline
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15032379A
Other languages
Japanese (ja)
Inventor
Yoshiiku Togei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15032379A priority Critical patent/JPS5673426A/en
Publication of JPS5673426A publication Critical patent/JPS5673426A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD

Abstract

PURPOSE:To enhance the yield rate and relaibility by providing an amorphous layer on one main surface of an Si substrate, heat-treating it, and forming elements on the other main surface. CONSTITUTION:A noncrystalline amorphous glassy Si layer is formed on one surface of the crystalline Si substrate by decomposition caused by a plasma CVD method of SiH4. When the noncrystalline material is treated at about 1,100 deg.C for two hours in N2, it is crystallized. The thermal stress-strain characteristics are changed by the change in volume due to the crystallization. The crystal defects in the Si substrate is induced into the field of stress and absorbed. Then, the elements are formed on the other surface. Since the crystal defects are greatly reduced, the yield rate and reliability can be enhanced.
JP15032379A 1979-11-20 1979-11-20 Manufacture of semiconductor device Pending JPS5673426A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15032379A JPS5673426A (en) 1979-11-20 1979-11-20 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15032379A JPS5673426A (en) 1979-11-20 1979-11-20 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5673426A true JPS5673426A (en) 1981-06-18

Family

ID=15494502

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15032379A Pending JPS5673426A (en) 1979-11-20 1979-11-20 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5673426A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07263453A (en) * 1994-03-25 1995-10-13 Toshiba Corp Semiconductor device and its manufacture

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07263453A (en) * 1994-03-25 1995-10-13 Toshiba Corp Semiconductor device and its manufacture

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