JPS5668991A - Complementary mis memory circuit - Google Patents

Complementary mis memory circuit

Info

Publication number
JPS5668991A
JPS5668991A JP14211279A JP14211279A JPS5668991A JP S5668991 A JPS5668991 A JP S5668991A JP 14211279 A JP14211279 A JP 14211279A JP 14211279 A JP14211279 A JP 14211279A JP S5668991 A JPS5668991 A JP S5668991A
Authority
JP
Japan
Prior art keywords
circuit
channel
load circuit
complementary
complementary mis
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14211279A
Other languages
Japanese (ja)
Other versions
JPS6318275B2 (en
Inventor
Noburo Tanimura
Norimasa Yasui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14211279A priority Critical patent/JPS5668991A/en
Publication of JPS5668991A publication Critical patent/JPS5668991A/en
Publication of JPS6318275B2 publication Critical patent/JPS6318275B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To realize the low power consumption without lowering the velocity of the circuit operation for an asynchronous complementary MIS memory circuit, by using the MISFET serial circuit of the n and p channels for the load circuit of the data line. CONSTITUTION:For the load circuit of the data line D of the complementary MIS memory circuit of the asynchronous type (full static type) which forms the memory cell, a serial connection is secured among the n channel FETQ7 and Q8 having a connection between the gate and the drain to obtain the output from the source plus the p channel FETQ11 and Q12 via the complementary flip-flop circuit of the n channel MISFETQ1 and Q2 plus the p channel MISFETQ3 and Q4 each. Thus each load circuit is obtained for the line D. As a result, the load circuit shows the constant current properties to give a limitation to the flowing current.
JP14211279A 1979-11-05 1979-11-05 Complementary mis memory circuit Granted JPS5668991A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14211279A JPS5668991A (en) 1979-11-05 1979-11-05 Complementary mis memory circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14211279A JPS5668991A (en) 1979-11-05 1979-11-05 Complementary mis memory circuit

Publications (2)

Publication Number Publication Date
JPS5668991A true JPS5668991A (en) 1981-06-09
JPS6318275B2 JPS6318275B2 (en) 1988-04-18

Family

ID=15307688

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14211279A Granted JPS5668991A (en) 1979-11-05 1979-11-05 Complementary mis memory circuit

Country Status (1)

Country Link
JP (1) JPS5668991A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0136811A2 (en) * 1983-09-21 1985-04-10 THORN EMI North America Inc. Bit line load and column circuitry for a semiconductor memory
JPH038197A (en) * 1989-06-06 1991-01-16 Oki Electric Ind Co Ltd Mos static ram

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH031800U (en) * 1989-05-31 1991-01-09

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54113222A (en) * 1978-02-24 1979-09-04 Hitachi Ltd Static type mis memory

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54113222A (en) * 1978-02-24 1979-09-04 Hitachi Ltd Static type mis memory

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0136811A2 (en) * 1983-09-21 1985-04-10 THORN EMI North America Inc. Bit line load and column circuitry for a semiconductor memory
JPH038197A (en) * 1989-06-06 1991-01-16 Oki Electric Ind Co Ltd Mos static ram

Also Published As

Publication number Publication date
JPS6318275B2 (en) 1988-04-18

Similar Documents

Publication Publication Date Title
JPS6435799A (en) Semiconductor integrated circuit
JPS5668991A (en) Complementary mis memory circuit
ES446151A1 (en) Low power detector circuit
JPS56124195A (en) Dynamic shift register circuit
JPS57147194A (en) Address buffer
KR890005996A (en) Synchronous flip-flop circuit
JPS54125950A (en) Current mirror circuit
JPS5471973A (en) Logical operation circuit
JPS56103536A (en) Mis output circuit
JPS57181231A (en) Semiconductor integrated circuit
JPS54114056A (en) Ternary logic circuit
JPS5634233A (en) Complementary level converting circuit
JPS56117388A (en) Address buffer circuit
JPS5484469A (en) Cmos inverter circuit of low power consumption
JPS5313852A (en) Level conversion circuit
JPS55128162A (en) Power supply voltage drop detector
JPS57192113A (en) Pulse width modulation amplifying circuit
JPS5758294A (en) Sense amplifier circuit
JPS5246736A (en) Semiconductor storage circuit
JPS5637890A (en) Static sequence circuit
JPS55136725A (en) Semiconductor logic circuit
JPS57152204A (en) Output buffer circuit
JPS5580922A (en) Complementary mos logic circuit
SE7608994L (en) WAY TO OPERATE THE CONTROL DEVICE IN A COMMUNICATION STATION, SEPARATE TELEPHONE COMMUNICATION STATION
Yun et al. A New Method for Threshold Voltage Decision of Power VDMOSFET