JPS5664572A - Multichannel display unit for television picture receiver - Google Patents

Multichannel display unit for television picture receiver

Info

Publication number
JPS5664572A
JPS5664572A JP13923879A JP13923879A JPS5664572A JP S5664572 A JPS5664572 A JP S5664572A JP 13923879 A JP13923879 A JP 13923879A JP 13923879 A JP13923879 A JP 13923879A JP S5664572 A JPS5664572 A JP S5664572A
Authority
JP
Japan
Prior art keywords
circuit
signal
channel
main channel
superimposed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13923879A
Other languages
Japanese (ja)
Inventor
Akira Matsushita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13923879A priority Critical patent/JPS5664572A/en
Publication of JPS5664572A publication Critical patent/JPS5664572A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
    • H04N5/45—Picture in picture, e.g. displaying simultaneously another television channel in a region of the screen

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE:To avoid receiving a control to the screen to be superimposed when the signal of other channel to be superimposed on the main channel screen is written into and read out of the memory, by controlling these writing and reading actions with the switch signal extracted out of the main channel signal. CONSTITUTION:The main channel signal is selected for channel by the electronic tuner 1 and then applied to the MIX circuit 3, synchronous isolating circuit 5 and color subcarrier isolating circuit 6 via the IF circuit 2. The other-channel signal is selected for channel by the electronic tuner 7 and then applied to the A/D converting circuit 9, isolating circuit 33 and synchronous isolating circuit 10 each via the IF circuit 8. The video signal is converted into the digital signal to be applied to the shift registers 13-15 and then written into the display memories 25 and 26 via the gate circuit 16 after a parallel-serial conversion. The data read out altenately out of the memories 25 and 26 receive a serial-parallel conversion through the shift registers 27-29 after passing through the gate circuit 17 to be converted into the analog form through the D/A converting circuit 30, and are superimposed on the main channel video signal via the circuit 3 to be applied to the cathode-ray tube via the video amplifying circuit 4.
JP13923879A 1979-10-30 1979-10-30 Multichannel display unit for television picture receiver Pending JPS5664572A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13923879A JPS5664572A (en) 1979-10-30 1979-10-30 Multichannel display unit for television picture receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13923879A JPS5664572A (en) 1979-10-30 1979-10-30 Multichannel display unit for television picture receiver

Publications (1)

Publication Number Publication Date
JPS5664572A true JPS5664572A (en) 1981-06-01

Family

ID=15240680

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13923879A Pending JPS5664572A (en) 1979-10-30 1979-10-30 Multichannel display unit for television picture receiver

Country Status (1)

Country Link
JP (1) JPS5664572A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62234491A (en) * 1986-03-04 1987-10-14 Nec Home Electronics Ltd Video signal generating circuit for small screen
JPS6350273A (en) * 1986-08-20 1988-03-03 Matsushita Electric Ind Co Ltd Delay time control circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62234491A (en) * 1986-03-04 1987-10-14 Nec Home Electronics Ltd Video signal generating circuit for small screen
JPS6350273A (en) * 1986-08-20 1988-03-03 Matsushita Electric Ind Co Ltd Delay time control circuit

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