JPS5662424A - Ad converter - Google Patents

Ad converter

Info

Publication number
JPS5662424A
JPS5662424A JP14011179A JP14011179A JPS5662424A JP S5662424 A JPS5662424 A JP S5662424A JP 14011179 A JP14011179 A JP 14011179A JP 14011179 A JP14011179 A JP 14011179A JP S5662424 A JPS5662424 A JP S5662424A
Authority
JP
Japan
Prior art keywords
decoder
content
memory circuit
signal
circuit groups
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14011179A
Other languages
Japanese (ja)
Inventor
Toshiyuki Ozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP14011179A priority Critical patent/JPS5662424A/en
Publication of JPS5662424A publication Critical patent/JPS5662424A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R13/00—Arrangements for displaying electric variables or waveforms
    • G01R13/20—Cathode-ray oscilloscopes
    • G01R13/22—Circuits therefor
    • G01R13/28—Circuits for simultaneous or sequential presentation of more than one variable

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To processes two different signals, by using an AD converter and a decoder in common. CONSTITUTION:In case of the use as a peak hold meter, left and right channel signals are respectively fed to the 1st and 2nd input terminals 1, 2. Each signal is alternately in AD conversion in time sharing and decoded in a decoder 6 at each timing. Further, each signal in AD conversion is compared with the content of memory circuit groups 4, 5 for the amplitude, and if new signal is greater than the stored content, the content is stored in the memory circuit groups 4 and 5. The content of the memory circuit groups 4, 5 is rewritten. That is, the peak value of left and right channels of the memory circuit group 4 is decoded at a decoder 7 during the 1st timing period, it is synthesized with the content of the decoder 6 at the decoder 8, and the result is displayed on a display device 10 via the memory circuit group 9. Further, similarly it is displayed on a display device 11 during the 2nd timing period.
JP14011179A 1979-10-29 1979-10-29 Ad converter Pending JPS5662424A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14011179A JPS5662424A (en) 1979-10-29 1979-10-29 Ad converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14011179A JPS5662424A (en) 1979-10-29 1979-10-29 Ad converter

Publications (1)

Publication Number Publication Date
JPS5662424A true JPS5662424A (en) 1981-05-28

Family

ID=15261171

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14011179A Pending JPS5662424A (en) 1979-10-29 1979-10-29 Ad converter

Country Status (1)

Country Link
JP (1) JPS5662424A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5870336A (en) * 1981-10-21 1983-04-26 Nec Corp Oscillating device
JPS614311A (en) * 1984-06-18 1986-01-10 Sanyo Electric Co Ltd Signal strength display device
US5227794A (en) * 1991-12-23 1993-07-13 Ford Motor Company Frequency multiplexed analog-digital conversion

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4854859A (en) * 1971-11-10 1973-08-01

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4854859A (en) * 1971-11-10 1973-08-01

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5870336A (en) * 1981-10-21 1983-04-26 Nec Corp Oscillating device
JPH039485B2 (en) * 1981-10-21 1991-02-08 Nippon Electric Co
JPS614311A (en) * 1984-06-18 1986-01-10 Sanyo Electric Co Ltd Signal strength display device
JPH0317409B2 (en) * 1984-06-18 1991-03-08 Sanyo Electric Co
US5227794A (en) * 1991-12-23 1993-07-13 Ford Motor Company Frequency multiplexed analog-digital conversion

Similar Documents

Publication Publication Date Title
JPS5279640A (en) Small-sized portable information apparatus
JPS5325324A (en) Address selection system
JPS52143717A (en) Line display data synthesis hold circuit
JPS5662424A (en) Ad converter
JPS5662423A (en) Ad converter
JPS5662422A (en) Ad converter
JPS5250619A (en) Image display device
JPS5420617A (en) Picture input system
JPS5275292A (en) Driving device for display units
JPS5422824A (en) Film counter
JPS5433055A (en) Display device
SU855723A1 (en) Device for displaying symbols on television screen
JPS52106635A (en) Display unit of program progression state
JPS56138366A (en) Video signal switching device
JPS53135520A (en) Driving circuit of electro-optical display unit
JPS5459835A (en) Display unit
JPS5280742A (en) Liquid crystal display unit
JPS5432243A (en) Operation unit
JPS5226115A (en) Profile compensating equipment
JPS5323543A (en) Analog signal delay circuit
JPS54107296A (en) Display unit for bar graph
JPS5488030A (en) Display system
JPS5435667A (en) Detection circuit for both am and fm
JPS5294068A (en) Panel display
JPS5432206A (en) Time sharing digital communication unit