JPS5650531A - Semiconductor integrated circuit and programming method therefor - Google Patents

Semiconductor integrated circuit and programming method therefor

Info

Publication number
JPS5650531A
JPS5650531A JP12540479A JP12540479A JPS5650531A JP S5650531 A JPS5650531 A JP S5650531A JP 12540479 A JP12540479 A JP 12540479A JP 12540479 A JP12540479 A JP 12540479A JP S5650531 A JPS5650531 A JP S5650531A
Authority
JP
Japan
Prior art keywords
layer
high resistance
programming
layers
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12540479A
Other languages
Japanese (ja)
Other versions
JPS5843906B2 (en
Inventor
Toshiaki Masuhara
Osamu Minato
Katsuhiro Shimohigashi
Hiroo Masuda
Hideo Sunami
Yoshio Sakai
Yoshiaki Kamigaki
Eiji Takeda
Yoshimune Hagiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP54125404A priority Critical patent/JPS5843906B2/en
Priority to DE3036869A priority patent/DE3036869C2/en
Priority to US06/192,869 priority patent/US4455495A/en
Publication of JPS5650531A publication Critical patent/JPS5650531A/en
Publication of JPS5843906B2 publication Critical patent/JPS5843906B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76892—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern
    • H01L21/76894—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern using a laser, e.g. laser cutting, laser direct writing, laser repair
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Read Only Memory (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To facilitate the modification of circuit constitution by providing a wiring layer for programming a circuit comprising a semiconductor layer wherein two low resistance parts oppose each other with a high resistance part being provided in- between on an insulating film on the surface of a semiconductor substrate, and reducing the resistance of the high resistance part. CONSTITUTION:On an SiO2 layer 8 on the surface of an Si substrate 9, n<+> type polycrystal layers 5 and 7 are arranged so that they oppose each other with a high resistance polycrystal Si layer 6 being provided in-between, thereby a wiring for programming is constituted. Diffusion is performed from the n<+> type low resistance layers 5 and 7 by irradiating a laser spot or an electron beam spot and giving the energy, thereby the high resistance layer 6 is converted into low resistance layer 11. In this method, the n<+> type layers 5 and 7 which have been in the nonconductive state before irradiation become the conductive state after the irradiation, and the programming wiring under the nonactive state becomes the active state. Therefore, the programmable IC can be readily formed, and ROMs, programmable logic arrays and the like can be readily constituted.
JP54125404A 1979-10-01 1979-10-01 Semiconductor integrated circuit and its circuit programming method Expired JPS5843906B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP54125404A JPS5843906B2 (en) 1979-10-01 1979-10-01 Semiconductor integrated circuit and its circuit programming method
DE3036869A DE3036869C2 (en) 1979-10-01 1980-09-30 Semiconductor integrated circuit and circuit activation method
US06/192,869 US4455495A (en) 1979-10-01 1980-10-01 Programmable semiconductor integrated circuitry including a programming semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54125404A JPS5843906B2 (en) 1979-10-01 1979-10-01 Semiconductor integrated circuit and its circuit programming method

Publications (2)

Publication Number Publication Date
JPS5650531A true JPS5650531A (en) 1981-05-07
JPS5843906B2 JPS5843906B2 (en) 1983-09-29

Family

ID=14909277

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54125404A Expired JPS5843906B2 (en) 1979-10-01 1979-10-01 Semiconductor integrated circuit and its circuit programming method

Country Status (1)

Country Link
JP (1) JPS5843906B2 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS584969A (en) * 1981-06-30 1983-01-12 Fujitsu Ltd Semiconductor device
JPS5893257A (en) * 1981-11-30 1983-06-02 Hitachi Ltd Connecting method and device for wirings
JPS58171833A (en) * 1982-04-02 1983-10-08 Hitachi Ltd Wiring connection by laser beam
JPS5955050A (en) * 1982-09-24 1984-03-29 Toshiba Corp Semiconductor device
WO1992007380A1 (en) * 1990-10-15 1992-04-30 Seiko Epson Corporation Semiconductor device having switching circuit to be switched by light and its fabrication process
US5281553A (en) * 1987-07-02 1994-01-25 Bull, S.A. Method for controlling the state of conduction of an MOS transistor of an integrated circuit
JP2019149513A (en) * 2018-02-28 2019-09-05 新日本無線株式会社 Intermediate for forming resistance element and manufacturing method of resistance element using the same

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS584969A (en) * 1981-06-30 1983-01-12 Fujitsu Ltd Semiconductor device
JPH0328072B2 (en) * 1981-06-30 1991-04-17 Fujitsu Ltd
JPS5893257A (en) * 1981-11-30 1983-06-02 Hitachi Ltd Connecting method and device for wirings
JPS58171833A (en) * 1982-04-02 1983-10-08 Hitachi Ltd Wiring connection by laser beam
JPH0318335B2 (en) * 1982-04-02 1991-03-12 Hitachi Ltd
JPS5955050A (en) * 1982-09-24 1984-03-29 Toshiba Corp Semiconductor device
US5281553A (en) * 1987-07-02 1994-01-25 Bull, S.A. Method for controlling the state of conduction of an MOS transistor of an integrated circuit
WO1992007380A1 (en) * 1990-10-15 1992-04-30 Seiko Epson Corporation Semiconductor device having switching circuit to be switched by light and its fabrication process
JP2019149513A (en) * 2018-02-28 2019-09-05 新日本無線株式会社 Intermediate for forming resistance element and manufacturing method of resistance element using the same

Also Published As

Publication number Publication date
JPS5843906B2 (en) 1983-09-29

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