JPS564281A - Insulated gate type field effect transistor - Google Patents

Insulated gate type field effect transistor

Info

Publication number
JPS564281A
JPS564281A JP8003679A JP8003679A JPS564281A JP S564281 A JPS564281 A JP S564281A JP 8003679 A JP8003679 A JP 8003679A JP 8003679 A JP8003679 A JP 8003679A JP S564281 A JPS564281 A JP S564281A
Authority
JP
Japan
Prior art keywords
region
type
annular
transistor
drain region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8003679A
Other languages
Japanese (ja)
Inventor
Hiroshi Iwahashi
Masamichi Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8003679A priority Critical patent/JPS564281A/en
Publication of JPS564281A publication Critical patent/JPS564281A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To provide an insulated gate type field effect transistor having high withstand voltage by forming the transistor (IGFET) of a circular drain region, a region having the same conducting type as the drain region and making contact therewith low impurity density, and an annular source region having the same conducting type as the drain region spaced therefrom. CONSTITUTION:A circular N<+>-type drain region 22 is diffused at the center of a P-type semiconductor substrate 21, and an N<->-type annular region 23 having lower density in impurity than the region 22 and shallower diffusing depth in N<->-type annular region 23 than the region 22 is formed around the region 22. Then, a similarly annular N<+>-type source region 24 to the substrate 21 spaced from the region 23 is diffused in the substrate 21, and a similarly annular gate electrode 25 is mounted through an annular gate oxide film 26 between the regions 22 and 24 to form an IGFET. When an ion is implanted to the outside of the region 24 to form a P<+>-type channel cut region 27 and a thick field oxide film is coated thereon in this manner, no impurity density is altered in the respective regions to eliminate the decrease of the withstand voltage in the transistor.
JP8003679A 1979-06-25 1979-06-25 Insulated gate type field effect transistor Pending JPS564281A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8003679A JPS564281A (en) 1979-06-25 1979-06-25 Insulated gate type field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8003679A JPS564281A (en) 1979-06-25 1979-06-25 Insulated gate type field effect transistor

Publications (1)

Publication Number Publication Date
JPS564281A true JPS564281A (en) 1981-01-17

Family

ID=13707021

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8003679A Pending JPS564281A (en) 1979-06-25 1979-06-25 Insulated gate type field effect transistor

Country Status (1)

Country Link
JP (1) JPS564281A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4651186A (en) * 1981-11-18 1987-03-17 Mitsubishi Denki Kabushiki Kaisha Field effect transistor with improved withstand voltage characteristic

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4651186A (en) * 1981-11-18 1987-03-17 Mitsubishi Denki Kabushiki Kaisha Field effect transistor with improved withstand voltage characteristic

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