JPS5635553A - Parallel data transfer system - Google Patents
Parallel data transfer systemInfo
- Publication number
- JPS5635553A JPS5635553A JP11042179A JP11042179A JPS5635553A JP S5635553 A JPS5635553 A JP S5635553A JP 11042179 A JP11042179 A JP 11042179A JP 11042179 A JP11042179 A JP 11042179A JP S5635553 A JPS5635553 A JP S5635553A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- data
- pulse
- timing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE:To produce the strobe signal at the reception side, by using the timing signal which is reversed with every transfer of the data as the synchronous signal for transfer of the data and then utilizing the level inversion of the timing signal. CONSTITUTION:The data D0-Dn-1 are transmitted via the output buffer circuits OB1-OBn-1. At the same time, the timing signal Dn generated from the synchronous timing generating circuit 2 is transmitted via the output buffer circuit OBn. And the pulse generating circuit 4 is provided to the output of the input buffer circuit IBn received the signal Dn. At the circuit 4, the strobe pulse phi is produced by means of the level inversion of the signal Dn and then supplied to the latch circuit 5. Then the data D1-Dn-1 supplied in parallel are taken in by the circuit 5 with the pulse phi used as the set pulse.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11042179A JPS5635553A (en) | 1979-08-31 | 1979-08-31 | Parallel data transfer system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11042179A JPS5635553A (en) | 1979-08-31 | 1979-08-31 | Parallel data transfer system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5635553A true JPS5635553A (en) | 1981-04-08 |
Family
ID=14535328
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11042179A Pending JPS5635553A (en) | 1979-08-31 | 1979-08-31 | Parallel data transfer system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5635553A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4563100A (en) * | 1983-11-30 | 1986-01-07 | Tokyo Electric Co., Ltd. | Ribbon-position switching device for printer |
EP0170638A2 (en) * | 1984-08-02 | 1986-02-05 | Fondazione Ugo Bordoni | Method of and apparatus for transmitting a clock signal via cable over long distances |
-
1979
- 1979-08-31 JP JP11042179A patent/JPS5635553A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4563100A (en) * | 1983-11-30 | 1986-01-07 | Tokyo Electric Co., Ltd. | Ribbon-position switching device for printer |
EP0170638A2 (en) * | 1984-08-02 | 1986-02-05 | Fondazione Ugo Bordoni | Method of and apparatus for transmitting a clock signal via cable over long distances |
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