JPS5635226A - Power supply control device - Google Patents

Power supply control device

Info

Publication number
JPS5635226A
JPS5635226A JP11023079A JP11023079A JPS5635226A JP S5635226 A JPS5635226 A JP S5635226A JP 11023079 A JP11023079 A JP 11023079A JP 11023079 A JP11023079 A JP 11023079A JP S5635226 A JPS5635226 A JP S5635226A
Authority
JP
Japan
Prior art keywords
power supply
freedom
control
rom
input power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11023079A
Other languages
Japanese (ja)
Inventor
Shuichi Inose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP11023079A priority Critical patent/JPS5635226A/en
Publication of JPS5635226A publication Critical patent/JPS5635226A/en
Pending legal-status Critical Current

Links

Landscapes

  • Continuous-Control Power Sources That Use Transistors (AREA)

Abstract

PURPOSE: To prevent the malfunction and at the same time reduce the amount of power consumption, by using the micro CPU and ROM with the power supply control device using the microprocessor and having a high degree of freedom for the control and thus securing a control with a higher degree of freedom for the on/off of the power supply, the on/off of the input power supply end the value of voltage each.
CONSTITUTION: During the on and off of the input power supply, the data of the ROM read out onto the data bus DBS is held at the output port OP by decoding the reset subroutine program of the ROM and the switch command given from the signal DTS. Accordingly, the driving signal is produced at the driving circuit DRV. The output of the circuit DRV is delayed by the delay circuit DLC until the micro CPUMPU becomes normal to then drive the power supply circuit PSC. As a result, a control is possible with a higher degree of freedom for the on/off of the power supply, the on/off of the input power supply and the value of voltage each. Thus the malfunction can be prevented, at the same time reducing the amount of power consumption.
COPYRIGHT: (C)1981,JPO&Japio
JP11023079A 1979-08-31 1979-08-31 Power supply control device Pending JPS5635226A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11023079A JPS5635226A (en) 1979-08-31 1979-08-31 Power supply control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11023079A JPS5635226A (en) 1979-08-31 1979-08-31 Power supply control device

Publications (1)

Publication Number Publication Date
JPS5635226A true JPS5635226A (en) 1981-04-07

Family

ID=14530385

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11023079A Pending JPS5635226A (en) 1979-08-31 1979-08-31 Power supply control device

Country Status (1)

Country Link
JP (1) JPS5635226A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5871814U (en) * 1981-11-05 1983-05-16 富士通株式会社 constant current power supply circuit
CN101963789A (en) * 2010-09-02 2011-02-02 常州市凯迪电器有限公司 Standby zero power consumption switch control system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5871814U (en) * 1981-11-05 1983-05-16 富士通株式会社 constant current power supply circuit
CN101963789A (en) * 2010-09-02 2011-02-02 常州市凯迪电器有限公司 Standby zero power consumption switch control system

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