JPS5616942A - Dubbing circuit for pcm recorder - Google Patents

Dubbing circuit for pcm recorder

Info

Publication number
JPS5616942A
JPS5616942A JP8776779A JP8776779A JPS5616942A JP S5616942 A JPS5616942 A JP S5616942A JP 8776779 A JP8776779 A JP 8776779A JP 8776779 A JP8776779 A JP 8776779A JP S5616942 A JPS5616942 A JP S5616942A
Authority
JP
Japan
Prior art keywords
dubbing
pcm
signal
circuit
analog signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8776779A
Other languages
Japanese (ja)
Inventor
Satoshi Kunii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8776779A priority Critical patent/JPS5616942A/en
Publication of JPS5616942A publication Critical patent/JPS5616942A/en
Pending legal-status Critical Current

Links

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE: To enable excellent dubbing with a simple constitution, by performing dubbing, by feeding the PCM signal restored into analog signal after reproduction to the PCM processing circuit controlled synchronizingly via the crystal oscillator with level adjustment.
CONSTITUTION: Analog signal is in PCM conversion with the PCM processing circuit 7 in synchronizing control with the clock based on the oscillated output of the crystal oscillator 12, redundant signal and additional error correction and compensation circuit 9, and transmission modulation circuit 10 and recorded on VTR2. Further, it is restored into analog signal at the circuit controlled with the reproducing sampling synchronizing clock stabilized at PLL 24. This signal is fed to the circuit 7 at almost full scale with the variable resistance 25 via the switch 8c having the contact DUB to become the PCM signal in synchronizing with the oscillated output of the oscillator 12 without being affected with temperature, etc. and at dubbing very little in period lag with a simple constitution, and at reproduction after dubbing, excellent dubbing removing the defect without servo operation can be made.
COPYRIGHT: (C)1981,JPO&Japio
JP8776779A 1979-07-11 1979-07-11 Dubbing circuit for pcm recorder Pending JPS5616942A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8776779A JPS5616942A (en) 1979-07-11 1979-07-11 Dubbing circuit for pcm recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8776779A JPS5616942A (en) 1979-07-11 1979-07-11 Dubbing circuit for pcm recorder

Publications (1)

Publication Number Publication Date
JPS5616942A true JPS5616942A (en) 1981-02-18

Family

ID=13924109

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8776779A Pending JPS5616942A (en) 1979-07-11 1979-07-11 Dubbing circuit for pcm recorder

Country Status (1)

Country Link
JP (1) JPS5616942A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2519173A1 (en) * 1981-12-29 1983-07-01 Victor Company Of Japan DEVICE FOR RECORDING AND REPRODUCING DATA

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2519173A1 (en) * 1981-12-29 1983-07-01 Victor Company Of Japan DEVICE FOR RECORDING AND REPRODUCING DATA

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