JPS56162147A - Microcomputer - Google Patents
MicrocomputerInfo
- Publication number
- JPS56162147A JPS56162147A JP5229580A JP5229580A JPS56162147A JP S56162147 A JPS56162147 A JP S56162147A JP 5229580 A JP5229580 A JP 5229580A JP 5229580 A JP5229580 A JP 5229580A JP S56162147 A JPS56162147 A JP S56162147A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- cpu
- memories
- switches
- cpu1
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
Abstract
PURPOSE:To increase the number of functions without changing software, by using a switching means to connect plural memories to a CPU in an alternative way and by initializing the CPU at the connection switching time. CONSTITUTION:N-sets of memory 2-1-2-N and a common I/O 3 are connected to a CPU1, and two series of rotary switches 4A and 4B operated manually are provided. Different programs are stored in memories 2-1-2-N. When switches 4A and 4B are connected to contacts 4A-N and 4B-N corresponding to the memory 2-N, only the memory 2-N is enable, and other memories are disable. When switches 4A and 4B are switched to contacts 4A-1 and 4B-1, a voltage of +5V is applied to a restart circuit 5 by the switch 4B, and the circuit 5 supplies the H level to the CPU 1 for about 50msec to reset and initialize the CPU1, and the memory 2-1 is made enable.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5229580A JPS56162147A (en) | 1980-04-22 | 1980-04-22 | Microcomputer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5229580A JPS56162147A (en) | 1980-04-22 | 1980-04-22 | Microcomputer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56162147A true JPS56162147A (en) | 1981-12-12 |
Family
ID=12910801
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5229580A Pending JPS56162147A (en) | 1980-04-22 | 1980-04-22 | Microcomputer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56162147A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5839343A (en) * | 1981-08-31 | 1983-03-08 | Nec Home Electronics Ltd | Initial starting device for plural systems |
JPS6024798A (en) * | 1983-07-20 | 1985-02-07 | Matsushita Electric Ind Co Ltd | Remote controller |
-
1980
- 1980-04-22 JP JP5229580A patent/JPS56162147A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5839343A (en) * | 1981-08-31 | 1983-03-08 | Nec Home Electronics Ltd | Initial starting device for plural systems |
JPS6024798A (en) * | 1983-07-20 | 1985-02-07 | Matsushita Electric Ind Co Ltd | Remote controller |
JPH0126238B2 (en) * | 1983-07-20 | 1989-05-23 | Matsushita Electric Ind Co Ltd |
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