JPS56152358A - Multilevel code transmission system - Google Patents
Multilevel code transmission systemInfo
- Publication number
- JPS56152358A JPS56152358A JP5472080A JP5472080A JPS56152358A JP S56152358 A JPS56152358 A JP S56152358A JP 5472080 A JP5472080 A JP 5472080A JP 5472080 A JP5472080 A JP 5472080A JP S56152358 A JPS56152358 A JP S56152358A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- transmission system
- inputted
- nrz signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE:To output a normal NRZ signal from the output terminal to perform the normal communication, by inverting the input signal to establish synchronization by the synchronizing circuit when the polarity is inverted. CONSTITUTION:The NRZ signal is inputted from input terminal 2-2 and is inputted to synchronizing circuit 2-5 through input circuit 2-3. If synchronization is acquired, the signal is outputted at the NRZ signal from output terminal 2-6. If the NRZ signal is inverted, the step-out signal is outputted from output terminal 2 by circuit 2-5, and inverting circuit 2-4 is operated, and the NRZ signal is inverted once and is inputted to circuit 2-5.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5472080A JPS56152358A (en) | 1980-04-24 | 1980-04-24 | Multilevel code transmission system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5472080A JPS56152358A (en) | 1980-04-24 | 1980-04-24 | Multilevel code transmission system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56152358A true JPS56152358A (en) | 1981-11-25 |
Family
ID=12978631
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5472080A Pending JPS56152358A (en) | 1980-04-24 | 1980-04-24 | Multilevel code transmission system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56152358A (en) |
-
1980
- 1980-04-24 JP JP5472080A patent/JPS56152358A/en active Pending
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