JPS56150823A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56150823A
JPS56150823A JP5471680A JP5471680A JPS56150823A JP S56150823 A JPS56150823 A JP S56150823A JP 5471680 A JP5471680 A JP 5471680A JP 5471680 A JP5471680 A JP 5471680A JP S56150823 A JPS56150823 A JP S56150823A
Authority
JP
Japan
Prior art keywords
substrate
glass layer
diffusion
impurity
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5471680A
Other languages
Japanese (ja)
Other versions
JPS589580B2 (en
Inventor
Tadashi Kirisako
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5471680A priority Critical patent/JPS589580B2/en
Publication of JPS56150823A publication Critical patent/JPS56150823A/en
Publication of JPS589580B2 publication Critical patent/JPS589580B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To prevent the semiconductor device from influence of humidity by a method wherein after a liquid glass layer containing the desired impurity is formed on a semiconductor substrate, a diffusion treatment process is performed in accordance with the lumping method. CONSTITUTION:An SiO2 film having the prescribed opening is formed on the surface of the P type Si substrate 1, and the liquid glass layer 3 containing the N type impurity is adhered on the substrate thereof. Then in a diffusion furnace regulated preliminary at the temperature lower than the diffusion temperature, the Si substrate 1 adhered with the glass layer 3 is inserted and is arranged to heat preliminary the substrate 1 and to remove the solvent in the glass layer 3. After then the temperature of furnace is made at the prescribed diffusion temperature to form the diffusion treatment of impurity from the glass layer 3 to the substrate 1. The impurity concentration of an N<+> type layer 4 obtained by this way is not affected by the storage method and the storage time after the formation of the glass layer 3.
JP5471680A 1980-04-24 1980-04-24 Manufacturing method of semiconductor device Expired JPS589580B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5471680A JPS589580B2 (en) 1980-04-24 1980-04-24 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5471680A JPS589580B2 (en) 1980-04-24 1980-04-24 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS56150823A true JPS56150823A (en) 1981-11-21
JPS589580B2 JPS589580B2 (en) 1983-02-22

Family

ID=12978522

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5471680A Expired JPS589580B2 (en) 1980-04-24 1980-04-24 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS589580B2 (en)

Also Published As

Publication number Publication date
JPS589580B2 (en) 1983-02-22

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