JPS56133857A - Manufacture of hybrid ic - Google Patents
Manufacture of hybrid icInfo
- Publication number
- JPS56133857A JPS56133857A JP3694380A JP3694380A JPS56133857A JP S56133857 A JPS56133857 A JP S56133857A JP 3694380 A JP3694380 A JP 3694380A JP 3694380 A JP3694380 A JP 3694380A JP S56133857 A JPS56133857 A JP S56133857A
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- hybrid
- bonded
- coated
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 2
- 239000003822 epoxy resin Substances 0.000 abstract 1
- 229920000647 polyepoxide Polymers 0.000 abstract 1
- 229920005989 resin Polymers 0.000 abstract 1
- 239000011347 resin Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/642—Heat extraction or cooling elements characterized by the shape
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3694380A JPS56133857A (en) | 1980-03-25 | 1980-03-25 | Manufacture of hybrid ic |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3694380A JPS56133857A (en) | 1980-03-25 | 1980-03-25 | Manufacture of hybrid ic |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56133857A true JPS56133857A (en) | 1981-10-20 |
Family
ID=12483824
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3694380A Pending JPS56133857A (en) | 1980-03-25 | 1980-03-25 | Manufacture of hybrid ic |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56133857A (ja) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0330372A2 (en) * | 1988-02-24 | 1989-08-30 | Nec Corporation | Hybrid ic with heat sink |
US6249050B1 (en) * | 1997-02-25 | 2001-06-19 | Micron Technology, Inc. | Encapsulated transfer molding of a semiconductor die with attached heat sink |
US6444501B1 (en) | 2001-06-12 | 2002-09-03 | Micron Technology, Inc. | Two stage transfer molding method to encapsulate MMC module |
USRE39957E1 (en) * | 2001-08-08 | 2007-12-25 | Siliconware Precision Industries Co., Ltd. | Method of making semiconductor package with heat spreader |
FR2965699A1 (fr) * | 2010-10-05 | 2012-04-06 | Commissariat Energie Atomique | Dispositif pour la dissipation thermique destine a au moins un composant electronique et procede correspondant |
-
1980
- 1980-03-25 JP JP3694380A patent/JPS56133857A/ja active Pending
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0330372A2 (en) * | 1988-02-24 | 1989-08-30 | Nec Corporation | Hybrid ic with heat sink |
US6583504B2 (en) | 1997-02-25 | 2003-06-24 | Micron Technology, Inc. | Semiconductor die with attached heat sink and transfer mold |
US6373132B2 (en) | 1997-02-25 | 2002-04-16 | Micron Technology, Inc. | Semiconductor die with attached heat sink and transfer mold |
US6403387B1 (en) * | 1997-02-25 | 2002-06-11 | Micron Technology | Method and apparatus for transfer molding encapsulation of a semiconductor die with attached heat sink |
US6249050B1 (en) * | 1997-02-25 | 2001-06-19 | Micron Technology, Inc. | Encapsulated transfer molding of a semiconductor die with attached heat sink |
US6869811B2 (en) | 1997-02-25 | 2005-03-22 | Micron Technology, Inc. | Methods for transfer molding encapsulation of a semiconductor die with attached heat sink |
US6444501B1 (en) | 2001-06-12 | 2002-09-03 | Micron Technology, Inc. | Two stage transfer molding method to encapsulate MMC module |
US6538311B2 (en) | 2001-06-12 | 2003-03-25 | Micron Technology, Inc. | Two-stage transfer molding method to encapsulate MMC module |
US6730995B2 (en) | 2001-06-12 | 2004-05-04 | Micron Technology, Inc. | Two-stage transfer molding device to encapsulate MMC module |
US6764882B2 (en) | 2001-06-12 | 2004-07-20 | Micron Technology, Inc. | Two-stage transfer molding method to encapsulate MMC module |
US7279781B2 (en) | 2001-06-12 | 2007-10-09 | Micron Technology, Inc. | Two-stage transfer molding device to encapsulate MMC module |
US7288441B2 (en) | 2001-06-12 | 2007-10-30 | Micron Technology, Inc. | Method for two-stage transfer molding device to encapsulate MMC module |
USRE39957E1 (en) * | 2001-08-08 | 2007-12-25 | Siliconware Precision Industries Co., Ltd. | Method of making semiconductor package with heat spreader |
FR2965699A1 (fr) * | 2010-10-05 | 2012-04-06 | Commissariat Energie Atomique | Dispositif pour la dissipation thermique destine a au moins un composant electronique et procede correspondant |
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