JPS56132623A - Information processor - Google Patents

Information processor

Info

Publication number
JPS56132623A
JPS56132623A JP3550180A JP3550180A JPS56132623A JP S56132623 A JPS56132623 A JP S56132623A JP 3550180 A JP3550180 A JP 3550180A JP 3550180 A JP3550180 A JP 3550180A JP S56132623 A JPS56132623 A JP S56132623A
Authority
JP
Japan
Prior art keywords
error
external
signal
data
tmu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3550180A
Other languages
Japanese (ja)
Inventor
Tsuneo Kinoshita
Fumitaka Sato
Isamu Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3550180A priority Critical patent/JPS56132623A/en
Priority to DE8585109933T priority patent/DE3177233D1/en
Priority to DE8181101837T priority patent/DE3176290D1/en
Priority to EP81101837A priority patent/EP0036185B1/en
Priority to EP85109933A priority patent/EP0172493B1/en
Priority to US06/244,623 priority patent/US4466055A/en
Publication of JPS56132623A publication Critical patent/JPS56132623A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Bus Control (AREA)
  • Microcomputers (AREA)
  • Information Transfer Systems (AREA)

Abstract

PURPOSE:To enable to contain many logic functions by effectively using the externally connected terminal limited, through the external status signal given to the specific terminal with common signal lines at a bundle for the operation controller of one chip by means of highly integrated semiconductor elements. CONSTITUTION:Microinstruction muI on the C-BUS103, memory address MA, and memory data MD reciprocate in the timing shown in a-d in time division, and reception/transmission of data with one chip CPU101 is made with external parts. The error signal such as the address error produced at the external of CPU, external error, and data error is given to the decoder 107. The decoder 107 fetches each error signal in the timing of TA, Tmu, TD in synchronizing with the phase signal. Further, each error signal is latched in FF1-FF3 in synchronizing with TA, Tmu, TD signals inside the CPU. Thus, various error generating state can be known from the state of FF1-FF3 and corresponding error processing can be executed.
JP3550180A 1980-03-19 1980-03-19 Information processor Pending JPS56132623A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP3550180A JPS56132623A (en) 1980-03-19 1980-03-19 Information processor
DE8585109933T DE3177233D1 (en) 1980-03-19 1981-03-12 DATA PROCESSING SYSTEM.
DE8181101837T DE3176290D1 (en) 1980-03-19 1981-03-12 Information processing system incorporating 1-chip arithmetic control unit of very large scale integrated semiconductor element
EP81101837A EP0036185B1 (en) 1980-03-19 1981-03-12 Information processing system incorporating 1-chip arithmetic control unit of very large scale integrated semiconductor element
EP85109933A EP0172493B1 (en) 1980-03-19 1981-03-12 Information processing system
US06/244,623 US4466055A (en) 1980-03-19 1981-03-17 Information processing system including a one-chip arithmetic control unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3550180A JPS56132623A (en) 1980-03-19 1980-03-19 Information processor

Publications (1)

Publication Number Publication Date
JPS56132623A true JPS56132623A (en) 1981-10-17

Family

ID=12443497

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3550180A Pending JPS56132623A (en) 1980-03-19 1980-03-19 Information processor

Country Status (1)

Country Link
JP (1) JPS56132623A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5136841A (en) * 1974-09-17 1976-03-27 Nippon Electric Co
JPS5261445A (en) * 1975-11-17 1977-05-20 Yokogawa Hokushin Electric Corp Input/output unit coupling circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5136841A (en) * 1974-09-17 1976-03-27 Nippon Electric Co
JPS5261445A (en) * 1975-11-17 1977-05-20 Yokogawa Hokushin Electric Corp Input/output unit coupling circuit

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