JPS56114358A - Semiconductor device and manufacture - Google Patents

Semiconductor device and manufacture

Info

Publication number
JPS56114358A
JPS56114358A JP1668780A JP1668780A JPS56114358A JP S56114358 A JPS56114358 A JP S56114358A JP 1668780 A JP1668780 A JP 1668780A JP 1668780 A JP1668780 A JP 1668780A JP S56114358 A JPS56114358 A JP S56114358A
Authority
JP
Japan
Prior art keywords
solder
wiring
electrode
wetting property
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1668780A
Other languages
Japanese (ja)
Inventor
Yuzuru Oji
Kiichiro Mukai
Shinichi Muramatsu
Shigeru Takahashi
Atsushi Hiraiwa
Ikuo Yoshida
Mikio Hirano
Toru Ito
Keiji Miyamoto
Akira Nagai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1668780A priority Critical patent/JPS56114358A/en
Publication of JPS56114358A publication Critical patent/JPS56114358A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/0231—Manufacturing methods of the redistribution layers
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
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    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H01L2224/05558—Shape in side view conformal layer on a patterned surface
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    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/1302—Disposition
    • H01L2224/13023—Disposition the whole bump connector protruding from the surface
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/13024—Disposition the bump connector being disposed on a redistribution layer on the semiconductor or solid-state body
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
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    • H01L2924/01022—Titanium [Ti]
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    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
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    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0504—14th Group
    • H01L2924/05042—Si3N4

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To obtain a microelectrode not short-circuitted by a flow of molten solder by a method wherein when a solder projecting electrode is formed on a metallic wiring, an electrode forming region is surrounded by a resin mask poor in wetting property with solder, and a metal satisfactory in wetting property with solder is mounted on the electrode forming region. CONSTITUTION:An Al first wiring 11 made to a prescribed pattern is formed on a semiconductor substrate 10, being covered on the top with an Si3N4 film 12 having an opening for contacting and the whole surface is cover-attached with a Ti second wiring 13 touching the wiring 11 through the opening. Then, a region intended to be formed with the solder projected electrode 21 is left exposed and other regions are covered with the resin mask 15 poor in wetting property with solder and cover- attached with a photoresist film 17 having an opening in the electrode 21 forming region. Thereafter, an Ni layer 18 which is excellent in wetting property with solder and prevents the solder from being diffused in the wiring 13 is formed by plating on the surface of the exposed wiring 13, and the solder 19 composed of Sn and Pb is mounted on the Ni layer and melted by heating to give the projecting electrode 21 in desired-shape with the help of surface tension.
JP1668780A 1980-02-15 1980-02-15 Semiconductor device and manufacture Pending JPS56114358A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1668780A JPS56114358A (en) 1980-02-15 1980-02-15 Semiconductor device and manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1668780A JPS56114358A (en) 1980-02-15 1980-02-15 Semiconductor device and manufacture

Publications (1)

Publication Number Publication Date
JPS56114358A true JPS56114358A (en) 1981-09-08

Family

ID=11923221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1668780A Pending JPS56114358A (en) 1980-02-15 1980-02-15 Semiconductor device and manufacture

Country Status (1)

Country Link
JP (1) JPS56114358A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62206856A (en) * 1986-03-07 1987-09-11 Hitachi Ltd Semiconductor device and manufacture thereof
JPS62232147A (en) * 1986-04-01 1987-10-12 Nec Corp Semiconductor device
JPS637640A (en) * 1986-06-27 1988-01-13 Toshiba Corp Manufacture of semiconductor device
JPH0364925A (en) * 1989-07-26 1991-03-20 Internatl Business Mach Corp <Ibm> Integrated circuit packaging structure and formation thereof
US5828128A (en) * 1995-08-01 1998-10-27 Fujitsu, Ltd. Semiconductor device having a bump which is inspected from outside and a circuit board used with such a semiconductor device
CN105675682A (en) * 2015-12-28 2016-06-15 中国人民大学 Size-controllable nanowire microelectrode, preparation method and application thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52152165A (en) * 1976-06-14 1977-12-17 Hitachi Ltd Formation of solder bump electrode
JPS56108245A (en) * 1980-01-31 1981-08-27 Fujitsu Ltd Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52152165A (en) * 1976-06-14 1977-12-17 Hitachi Ltd Formation of solder bump electrode
JPS56108245A (en) * 1980-01-31 1981-08-27 Fujitsu Ltd Semiconductor device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62206856A (en) * 1986-03-07 1987-09-11 Hitachi Ltd Semiconductor device and manufacture thereof
JPS62232147A (en) * 1986-04-01 1987-10-12 Nec Corp Semiconductor device
JPS637640A (en) * 1986-06-27 1988-01-13 Toshiba Corp Manufacture of semiconductor device
JPH0453096B2 (en) * 1986-06-27 1992-08-25 Tokyo Shibaura Electric Co
JPH0364925A (en) * 1989-07-26 1991-03-20 Internatl Business Mach Corp <Ibm> Integrated circuit packaging structure and formation thereof
US5828128A (en) * 1995-08-01 1998-10-27 Fujitsu, Ltd. Semiconductor device having a bump which is inspected from outside and a circuit board used with such a semiconductor device
CN105675682A (en) * 2015-12-28 2016-06-15 中国人民大学 Size-controllable nanowire microelectrode, preparation method and application thereof
CN105675682B (en) * 2015-12-28 2019-03-26 中国人民大学 A kind of nano wire microelectrode and the preparation method and application thereof that size is controllable

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