JPS56110341A - Complementary inverter circuit - Google Patents

Complementary inverter circuit

Info

Publication number
JPS56110341A
JPS56110341A JP1315280A JP1315280A JPS56110341A JP S56110341 A JPS56110341 A JP S56110341A JP 1315280 A JP1315280 A JP 1315280A JP 1315280 A JP1315280 A JP 1315280A JP S56110341 A JPS56110341 A JP S56110341A
Authority
JP
Japan
Prior art keywords
fet4
input transition
transition voltage
fet6
inverter circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1315280A
Other languages
Japanese (ja)
Other versions
JPH0120810B2 (en
Inventor
Shigero Kuninobu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1315280A priority Critical patent/JPS56110341A/en
Publication of JPS56110341A publication Critical patent/JPS56110341A/en
Publication of JPH0120810B2 publication Critical patent/JPH0120810B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To ensure a big change of the input transition voltage, by changing the source potential of the MOSFET forming an inverter with another MOSFET in addition to the normal method that changes the input transition voltage and furthermore realizing a change of the input transition voltage. CONSTITUTION:The MOSFET5 having the same polarity as the MOSFET4 is connected in series to the source of the FET4, and the MOSFET6 having the reverse polarity to the FET4 is connected in parallel to the FET4, respectively. Then the gate of the FET6 is connected in common to the gate of the FET4. Thus in case the input transition voltage is increased, the current flows through the FET6 in addition to the current that flows to an inverter circuit comprising the FETs 3-5. As a result, the drain potential of the FET5 increases more than the case including no FET6, and thus the threshold voltage of the FET4 increases by an amount equivalent to an increase of the drain potential of the FET5. Accordingly, the input transition voltage of the inverter circuit increases. The input transition voltage can be reduced by connecting the FET6 between the terminal 2 and the GND.
JP1315280A 1980-02-05 1980-02-05 Complementary inverter circuit Granted JPS56110341A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1315280A JPS56110341A (en) 1980-02-05 1980-02-05 Complementary inverter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1315280A JPS56110341A (en) 1980-02-05 1980-02-05 Complementary inverter circuit

Publications (2)

Publication Number Publication Date
JPS56110341A true JPS56110341A (en) 1981-09-01
JPH0120810B2 JPH0120810B2 (en) 1989-04-18

Family

ID=11825185

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1315280A Granted JPS56110341A (en) 1980-02-05 1980-02-05 Complementary inverter circuit

Country Status (1)

Country Link
JP (1) JPS56110341A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50104840A (en) * 1974-01-19 1975-08-19
JPS5214074A (en) * 1975-06-24 1977-02-02 Agency Of Ind Science & Technol Method and device to automatically measure the indicator of amount of activated sludge

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50104840A (en) * 1974-01-19 1975-08-19
JPS5214074A (en) * 1975-06-24 1977-02-02 Agency Of Ind Science & Technol Method and device to automatically measure the indicator of amount of activated sludge

Also Published As

Publication number Publication date
JPH0120810B2 (en) 1989-04-18

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