JPS559201A - Buffer memory control system - Google Patents
Buffer memory control systemInfo
- Publication number
- JPS559201A JPS559201A JP7960278A JP7960278A JPS559201A JP S559201 A JPS559201 A JP S559201A JP 7960278 A JP7960278 A JP 7960278A JP 7960278 A JP7960278 A JP 7960278A JP S559201 A JPS559201 A JP S559201A
- Authority
- JP
- Japan
- Prior art keywords
- data
- buffer memory
- block
- information
- buffer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To increase the buffer hit rate by always residing the data at lower addres sections on the buffer memory.
CONSTITUTION: In transferring and storing the data on the main memory on the buffer memory unit in one block unit, the IR information is produced based on the address information of the data block, and the information produced is written in the address information storage areas 3'-0 to 3'-3 at the tag section 1' with the address information at the data block. Further, in data readout processing, when desired data is not in existence on the buffer memory unit, the IR information is referenced. The data block in which the IR information is Science (1), for example, is excluded from the block of the objective of replacement, i.e., replacement objective block so that the data block can be resident on the buffer memory unit. Thus, the buffer hit rate can be increased.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7960278A JPS559201A (en) | 1978-06-30 | 1978-06-30 | Buffer memory control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7960278A JPS559201A (en) | 1978-06-30 | 1978-06-30 | Buffer memory control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS559201A true JPS559201A (en) | 1980-01-23 |
Family
ID=13694553
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7960278A Pending JPS559201A (en) | 1978-06-30 | 1978-06-30 | Buffer memory control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS559201A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6061844A (en) * | 1983-09-14 | 1985-04-09 | Fujitsu Ltd | Cache control system |
JPS6065358A (en) * | 1983-09-20 | 1985-04-15 | Fujitsu Ltd | Cache control system |
-
1978
- 1978-06-30 JP JP7960278A patent/JPS559201A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6061844A (en) * | 1983-09-14 | 1985-04-09 | Fujitsu Ltd | Cache control system |
JPS6351296B2 (en) * | 1983-09-14 | 1988-10-13 | Fujitsu Ltd | |
JPS6065358A (en) * | 1983-09-20 | 1985-04-15 | Fujitsu Ltd | Cache control system |
JPH0514292B2 (en) * | 1983-09-20 | 1993-02-24 | Fujitsu Ltd |
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