JPS5564693A - Buffer memory unit - Google Patents
Buffer memory unitInfo
- Publication number
- JPS5564693A JPS5564693A JP13658378A JP13658378A JPS5564693A JP S5564693 A JPS5564693 A JP S5564693A JP 13658378 A JP13658378 A JP 13658378A JP 13658378 A JP13658378 A JP 13658378A JP S5564693 A JPS5564693 A JP S5564693A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- main memory
- unit
- buffer memory
- stored
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
- Debugging And Monitoring (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
PURPOSE: To make it possible to continue operations by minimizing an influence of a small error at a main memory address on the whole system by using the needed part of the buffer memory of a buffer memory unit, matching the processing speed of a logic unit with that of a main memory unit, instead of main memory.
CONSTITUTION: This unit is provided with address memory part 1 stored with addresses equivalent to data in a main memory, data memory part 2 stored with the copy of part of the contents of the main memory on a fixed unit, and error bit memory part 4 stored with bits indicating whether or not a fault occurs to main memory addresses corresponding to the contents of this data memory part 2. By controlling a read/write command from the logic unit, block contents with an error bit of "1" are not led out from the buffer memory and part of buffer memory is used as a substitute for the main memory. Consequently, an influence of a small error at a main memory address on the whole system is minimized to make it possible to continue operations.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13658378A JPS5564693A (en) | 1978-11-06 | 1978-11-06 | Buffer memory unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13658378A JPS5564693A (en) | 1978-11-06 | 1978-11-06 | Buffer memory unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5564693A true JPS5564693A (en) | 1980-05-15 |
Family
ID=15178664
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13658378A Pending JPS5564693A (en) | 1978-11-06 | 1978-11-06 | Buffer memory unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5564693A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4581701A (en) * | 1982-04-23 | 1986-04-08 | Hartmann & Braun Ag | Monitoring plural process control stations |
WO1987000943A1 (en) * | 1985-08-02 | 1987-02-12 | Ant Nachrichtentechnik Gmbh | Circuit and process for coefficient transmission |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51127626A (en) * | 1975-04-30 | 1976-11-06 | Hitachi Ltd | Information processor |
JPS51138345A (en) * | 1975-05-26 | 1976-11-29 | Hitachi Ltd | Information processing apparatus |
JPS5282140A (en) * | 1975-12-29 | 1977-07-09 | Fujitsu Ltd | Error control system for memory system |
-
1978
- 1978-11-06 JP JP13658378A patent/JPS5564693A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51127626A (en) * | 1975-04-30 | 1976-11-06 | Hitachi Ltd | Information processor |
JPS51138345A (en) * | 1975-05-26 | 1976-11-29 | Hitachi Ltd | Information processing apparatus |
JPS5282140A (en) * | 1975-12-29 | 1977-07-09 | Fujitsu Ltd | Error control system for memory system |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4581701A (en) * | 1982-04-23 | 1986-04-08 | Hartmann & Braun Ag | Monitoring plural process control stations |
WO1987000943A1 (en) * | 1985-08-02 | 1987-02-12 | Ant Nachrichtentechnik Gmbh | Circuit and process for coefficient transmission |
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