JPS5591870A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5591870A
JPS5591870A JP16497278A JP16497278A JPS5591870A JP S5591870 A JPS5591870 A JP S5591870A JP 16497278 A JP16497278 A JP 16497278A JP 16497278 A JP16497278 A JP 16497278A JP S5591870 A JPS5591870 A JP S5591870A
Authority
JP
Japan
Prior art keywords
film
oxide film
operating
silicon
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16497278A
Other languages
Japanese (ja)
Inventor
Atsushi Nakano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16497278A priority Critical patent/JPS5591870A/en
Publication of JPS5591870A publication Critical patent/JPS5591870A/en
Pending legal-status Critical Current

Links

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  • Electrodes Of Semiconductors (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE: To reduce the step working process, by forming wing regions of a low impurity concentration adjacent to a drain region by diffusing an impurity from a silicon film, containing an impurity, which is formed selectively by means of an oxide film, without using ion injection.
CONSTITUTION: After field-use, heat-oxidized film 2, and gate oxide film 2G are formed on a p-type silicon semiconductor substrate 1; a silicon gate electrode 3G is formed and its surface is covered with an oxide film 4G. Next, a silicon film 5 is formed, and by operating patterning of a gate oxide film 2G, source and drain forming windows are formed. Next, phosphoric silicate glass film 6 is formed, and by operating heat treatment, n+-type source region 7 and n+-type drain region 8 are formed. At the same time, wing region 8' is formed. Subsequently, by operating patterning of phosphoric silicate glass film 6, electrode contact windows are formed, and by operating heat treatment, metal electrodes and wirings are formed.
COPYRIGHT: (C)1980,JPO&Japio
JP16497278A 1978-12-28 1978-12-28 Manufacture of semiconductor device Pending JPS5591870A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16497278A JPS5591870A (en) 1978-12-28 1978-12-28 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16497278A JPS5591870A (en) 1978-12-28 1978-12-28 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5591870A true JPS5591870A (en) 1980-07-11

Family

ID=15803372

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16497278A Pending JPS5591870A (en) 1978-12-28 1978-12-28 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5591870A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04349514A (en) * 1991-05-27 1992-12-04 Toyota Autom Loom Works Ltd Turnover mechanism for clutch pedal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04349514A (en) * 1991-05-27 1992-12-04 Toyota Autom Loom Works Ltd Turnover mechanism for clutch pedal

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