JPS5587378A - Mis input circuit - Google Patents

Mis input circuit

Info

Publication number
JPS5587378A
JPS5587378A JP15854978A JP15854978A JPS5587378A JP S5587378 A JPS5587378 A JP S5587378A JP 15854978 A JP15854978 A JP 15854978A JP 15854978 A JP15854978 A JP 15854978A JP S5587378 A JPS5587378 A JP S5587378A
Authority
JP
Japan
Prior art keywords
voltage
signal
mis
division
differential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15854978A
Other languages
Japanese (ja)
Other versions
JPS6043587B2 (en
Inventor
Masao Mizukami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP53158549A priority Critical patent/JPS6043587B2/en
Publication of JPS5587378A publication Critical patent/JPS5587378A/en
Publication of JPS6043587B2 publication Critical patent/JPS6043587B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/415Address circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To realize the signal identification with a high accuracy by using the differential voltage of the ECL-level signals of the opposite phase to each other as the reference signal after division of the voltage. CONSTITUTION:At the MIS memory circuit side, voltage-division resistances R4 and R5 set to the equal level are provided between the chip selection signal terminals along with installation of noise absorption capacitor C between the voltage-division output and the AC-type earth terminal. Thus reference voltage Vref' is formed. Then the MIS differential amplifier circuit is formed with differential MISFETQ10 and MISFETQ11 having a common source, drain load MISFETQ12 and MIS FETQ13 plus source resistance R6 each. Thus voltage Vref' is applied to the gate of MISFETQ11, and signal x formed in ECL circuit 1 is supplied directly to the gate of MISFETQ10. Thus the signal is obtained with its level identified.
JP53158549A 1978-12-25 1978-12-25 MIS input circuit Expired JPS6043587B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53158549A JPS6043587B2 (en) 1978-12-25 1978-12-25 MIS input circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53158549A JPS6043587B2 (en) 1978-12-25 1978-12-25 MIS input circuit

Publications (2)

Publication Number Publication Date
JPS5587378A true JPS5587378A (en) 1980-07-02
JPS6043587B2 JPS6043587B2 (en) 1985-09-28

Family

ID=15674127

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53158549A Expired JPS6043587B2 (en) 1978-12-25 1978-12-25 MIS input circuit

Country Status (1)

Country Link
JP (1) JPS6043587B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59180710A (en) * 1983-03-31 1984-10-13 Toshiba Corp Charging and discharging circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59180710A (en) * 1983-03-31 1984-10-13 Toshiba Corp Charging and discharging circuit

Also Published As

Publication number Publication date
JPS6043587B2 (en) 1985-09-28

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