JPS558161A - Clock generation circuit - Google Patents

Clock generation circuit

Info

Publication number
JPS558161A
JPS558161A JP8110678A JP8110678A JPS558161A JP S558161 A JPS558161 A JP S558161A JP 8110678 A JP8110678 A JP 8110678A JP 8110678 A JP8110678 A JP 8110678A JP S558161 A JPS558161 A JP S558161A
Authority
JP
Japan
Prior art keywords
output
synchronization
horizontal
signals
timing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8110678A
Other languages
Japanese (ja)
Other versions
JPS6346636B2 (en
Inventor
Satoru Yazawa
Minoru Hosokawa
Katsuyuki Ikeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP8110678A priority Critical patent/JPS558161A/en
Publication of JPS558161A publication Critical patent/JPS558161A/en
Publication of JPS6346636B2 publication Critical patent/JPS6346636B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Abstract

PURPOSE: To minimize even the horizontal shift of the liquid crystal TV screen and thus to enhance the picture quality by producing the sampling clock signals from the horizontal synchronous signals and then securing the synchronization for the sampling timing in each horizontal scanning.
CONSTITUTION: Both the frequency and phase control are given to oscillation circuit 34 with the output of phase comparator 31 plus the output of subsequent LPF32. At the same time, the output of circuit 34 or the signal obtained by multiplying and dividing the output of 34 is drawn out in the form of sampling clock 38 of the video signal and horizontal synchronous oscillation output 37. With use of these signals, the synchronization is secured for the video signal sampling timing on each horizontal line, and also the timing has assured synchronization to the same picture element with each frame. As a result, the contour blur is reduced on the TV screen, at the same time enhancing the resolution greatly.
COPYRIGHT: (C)1980,JPO&Japio
JP8110678A 1978-07-05 1978-07-05 Clock generation circuit Granted JPS558161A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8110678A JPS558161A (en) 1978-07-05 1978-07-05 Clock generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8110678A JPS558161A (en) 1978-07-05 1978-07-05 Clock generation circuit

Publications (2)

Publication Number Publication Date
JPS558161A true JPS558161A (en) 1980-01-21
JPS6346636B2 JPS6346636B2 (en) 1988-09-16

Family

ID=13737120

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8110678A Granted JPS558161A (en) 1978-07-05 1978-07-05 Clock generation circuit

Country Status (1)

Country Link
JP (1) JPS558161A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5741078A (en) * 1980-08-22 1982-03-06 Seiko Epson Corp Synchronizing circuit of matrix television
JPS58129313U (en) * 1982-02-25 1983-09-01 橋本フオ−ミング工業株式会社 clip
JPS6073914U (en) * 1983-10-26 1985-05-24 ポツプリベツト・フアスナー株式会社 clip
JPS60245378A (en) * 1984-05-18 1985-12-05 Matsushita Electric Ind Co Ltd Liquid crystal panel driving device
JPS6256081A (en) * 1986-07-08 1987-03-11 Casio Comput Co Ltd Pocketable television receiver
JPS6333277U (en) * 1987-07-23 1988-03-03
US4996596A (en) * 1988-09-02 1991-02-26 Sanyo Electric Co., Ltd. Phase synchronizing circuit in video signal receiver and method of establishing phase synchronization
US5668469A (en) * 1993-06-28 1997-09-16 Hitachi Denshi Kabushiki Kaisha Digital oscilloscope using color plane display device and data display method therefore

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5741078A (en) * 1980-08-22 1982-03-06 Seiko Epson Corp Synchronizing circuit of matrix television
JPS58129313U (en) * 1982-02-25 1983-09-01 橋本フオ−ミング工業株式会社 clip
JPS6073914U (en) * 1983-10-26 1985-05-24 ポツプリベツト・フアスナー株式会社 clip
JPS6235937Y2 (en) * 1983-10-26 1987-09-12
JPS60245378A (en) * 1984-05-18 1985-12-05 Matsushita Electric Ind Co Ltd Liquid crystal panel driving device
JPS6256081A (en) * 1986-07-08 1987-03-11 Casio Comput Co Ltd Pocketable television receiver
JPS6333277U (en) * 1987-07-23 1988-03-03
JPH0246145Y2 (en) * 1987-07-23 1990-12-05
US4996596A (en) * 1988-09-02 1991-02-26 Sanyo Electric Co., Ltd. Phase synchronizing circuit in video signal receiver and method of establishing phase synchronization
US5668469A (en) * 1993-06-28 1997-09-16 Hitachi Denshi Kabushiki Kaisha Digital oscilloscope using color plane display device and data display method therefore

Also Published As

Publication number Publication date
JPS6346636B2 (en) 1988-09-16

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