JPS5559554A - Program control system - Google Patents

Program control system

Info

Publication number
JPS5559554A
JPS5559554A JP13348678A JP13348678A JPS5559554A JP S5559554 A JPS5559554 A JP S5559554A JP 13348678 A JP13348678 A JP 13348678A JP 13348678 A JP13348678 A JP 13348678A JP S5559554 A JPS5559554 A JP S5559554A
Authority
JP
Japan
Prior art keywords
status
subroutine
program
routine
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13348678A
Other languages
Japanese (ja)
Inventor
Takuya Kuroda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13348678A priority Critical patent/JPS5559554A/en
Publication of JPS5559554A publication Critical patent/JPS5559554A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To simplify the program and thus to lower the cost by storing the table showing the subroutine addresses corresponding to the subroutine controlling the action, the status and the event each into the memory.
CONSTITUTION: When the program control unit is in status S1 and status S1 is stored in status register 3, event E1 occurs through operation of keyboard 4. In such case, control part 1 receives E1 through signal line (a) and then reads status S1 of the present unit from register 3 via the process of main routine N, and routine N reads out in single meaning the contents of program address table M from S1 and E1. As a result, head address A of subroutine A and status S2 which transferes next are read out from memory 2. Routine N holds the code of status S2 and then jumps to the subroutine shown by address A. Subroutine A carries out the processes written there and then performs the action decided by the combination of S1 and E1.
COPYRIGHT: (C)1980,JPO&Japio
JP13348678A 1978-10-30 1978-10-30 Program control system Pending JPS5559554A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13348678A JPS5559554A (en) 1978-10-30 1978-10-30 Program control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13348678A JPS5559554A (en) 1978-10-30 1978-10-30 Program control system

Publications (1)

Publication Number Publication Date
JPS5559554A true JPS5559554A (en) 1980-05-06

Family

ID=15105886

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13348678A Pending JPS5559554A (en) 1978-10-30 1978-10-30 Program control system

Country Status (1)

Country Link
JP (1) JPS5559554A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5850045A (en) * 1981-09-18 1983-03-24 Fujitsu Ltd Module controlling system
JPS5862997A (en) * 1981-10-09 1983-04-14 Fujitsu Ltd Processing system by transition matrix
JPS58169602A (en) * 1982-03-31 1983-10-06 Fujitsu Ltd Sequence checking circuit
JPS59733A (en) * 1982-06-28 1984-01-05 Fujitsu Ltd Control system of conversation processing
JPS60250434A (en) * 1984-05-25 1985-12-11 Toshiba Corp Scheduler control system
JPS61187048A (en) * 1985-02-14 1986-08-20 Fujitsu Ltd Alarm processing system
JPS6395542A (en) * 1986-10-09 1988-04-26 Nec Corp Processor for transmission control
JPH02268334A (en) * 1989-04-11 1990-11-02 Fuji Xerox Co Ltd State controlling system

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5850045A (en) * 1981-09-18 1983-03-24 Fujitsu Ltd Module controlling system
JPS5862997A (en) * 1981-10-09 1983-04-14 Fujitsu Ltd Processing system by transition matrix
JPS58169602A (en) * 1982-03-31 1983-10-06 Fujitsu Ltd Sequence checking circuit
JPS59733A (en) * 1982-06-28 1984-01-05 Fujitsu Ltd Control system of conversation processing
JPS60250434A (en) * 1984-05-25 1985-12-11 Toshiba Corp Scheduler control system
JPS61187048A (en) * 1985-02-14 1986-08-20 Fujitsu Ltd Alarm processing system
JPH0518141B2 (en) * 1985-02-14 1993-03-11 Fujitsu Ltd
JPS6395542A (en) * 1986-10-09 1988-04-26 Nec Corp Processor for transmission control
JPH0535896B2 (en) * 1986-10-09 1993-05-27 Nippon Electric Co
JPH02268334A (en) * 1989-04-11 1990-11-02 Fuji Xerox Co Ltd State controlling system

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