JPS554625A - Detection system for abnormality of electronic computer - Google Patents

Detection system for abnormality of electronic computer

Info

Publication number
JPS554625A
JPS554625A JP7706078A JP7706078A JPS554625A JP S554625 A JPS554625 A JP S554625A JP 7706078 A JP7706078 A JP 7706078A JP 7706078 A JP7706078 A JP 7706078A JP S554625 A JPS554625 A JP S554625A
Authority
JP
Japan
Prior art keywords
signal
computer
logic
abnormality
electronic computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7706078A
Other languages
Japanese (ja)
Inventor
Yojiro Yokoi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyosan Electric Manufacturing Co Ltd
Original Assignee
Kyosan Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyosan Electric Manufacturing Co Ltd filed Critical Kyosan Electric Manufacturing Co Ltd
Priority to JP7706078A priority Critical patent/JPS554625A/en
Publication of JPS554625A publication Critical patent/JPS554625A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To obtain a high-reliability abnormality detection system by interrupting an electronic computer on a constant cycle and by extracting the logic of the operation supervisory output port of the computer, inverted between "0" and "1" at every time when a fixed number of interruptions end, via BPF and a transformer.
CONSTITUTION: On interrupting electronic computer 1 by fixed-cycle interruption signal 9 from timer 2, the interruption routine of computer 1 inverts the logic of the operation supervisory output port of the computer between "1" and "0" at every time of the transmission of several pulses from the timer and then outputs constant- frequency rectangular signal 9. Signal 9 is passed through BPF5 to output signal 10, which is also passed through rectifier circuit 7 from transformer 6, thereby obtaining normal operation signal 11a of logic "1" of the operation supervisory signal. When the operation of the computer becomes abnormal, absence of signal 9 or variation in frequency occurs, so that the output of circuit 7 will be zero, namely, 11b. Even if BPF gets out of order, the operation supervisory signal never stays at logic "1", and the abnormality can definitely be detected.
COPYRIGHT: (C)1980,JPO&Japio
JP7706078A 1978-06-27 1978-06-27 Detection system for abnormality of electronic computer Pending JPS554625A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7706078A JPS554625A (en) 1978-06-27 1978-06-27 Detection system for abnormality of electronic computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7706078A JPS554625A (en) 1978-06-27 1978-06-27 Detection system for abnormality of electronic computer

Publications (1)

Publication Number Publication Date
JPS554625A true JPS554625A (en) 1980-01-14

Family

ID=13623240

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7706078A Pending JPS554625A (en) 1978-06-27 1978-06-27 Detection system for abnormality of electronic computer

Country Status (1)

Country Link
JP (1) JPS554625A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6096219U (en) * 1983-12-05 1985-07-01 日本オフセツト株式会社 Mosquito repellent storage container

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6096219U (en) * 1983-12-05 1985-07-01 日本オフセツト株式会社 Mosquito repellent storage container

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