JPS5542443A - Clock supervisory system - Google Patents

Clock supervisory system

Info

Publication number
JPS5542443A
JPS5542443A JP11576078A JP11576078A JPS5542443A JP S5542443 A JPS5542443 A JP S5542443A JP 11576078 A JP11576078 A JP 11576078A JP 11576078 A JP11576078 A JP 11576078A JP S5542443 A JPS5542443 A JP S5542443A
Authority
JP
Japan
Prior art keywords
clock
circuit
output
oscillator
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11576078A
Other languages
Japanese (ja)
Other versions
JPS59179B2 (en
Inventor
Akira Horiki
Kazuo Hamasato
Kiyotaka Kameda
Chukichi Ono
Haruki Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP53115760A priority Critical patent/JPS59179B2/en
Publication of JPS5542443A publication Critical patent/JPS5542443A/en
Publication of JPS59179B2 publication Critical patent/JPS59179B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M3/00Automatic or semi-automatic exchanges
    • H04M3/22Arrangements for supervision, monitoring or testing
    • H04M3/24Arrangements for supervision, monitoring or testing with provision for checking the normal operation
    • H04M3/244Arrangements for supervision, monitoring or testing with provision for checking the normal operation for multiplex systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To facilitate an easy cut-off of the fault and thus to realize an earlier detection of the clock-system fault by separating the input clock break detection circuit from the output clock phase step-out detection circuit of the phase lock oscillator, thus enhancing the reliability for supply and distribution of the clock. CONSTITUTION:Phase lock oscillator PLO3 is constituted with phase detector 31, LPF3(LPF32, oscillator 33 and local divider 34 each. Then the output clock frequency of oscillator 3 is divided through divider circuit 4 to deliver clock frequencies 4fN, 2fN and fN each to the output terminal. The step-out detection is given to oscillator 3 via output clock supervisory circuit 11 which supplies the output of detector 31, and the beat signal is generated in case the phase step-out is detected. At the same time, the phase step-out detection is given to the input clock via output clock supervisory circuit 11 which uses the output of lock route switch circuit 1 and circuit 4 as the input. Then the output of circuit 11 is applied to circuit 1 via clock route switch control circuit 2 to facilitate the switching of the clock route.
JP53115760A 1978-09-22 1978-09-22 Clock monitoring method Expired JPS59179B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53115760A JPS59179B2 (en) 1978-09-22 1978-09-22 Clock monitoring method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53115760A JPS59179B2 (en) 1978-09-22 1978-09-22 Clock monitoring method

Publications (2)

Publication Number Publication Date
JPS5542443A true JPS5542443A (en) 1980-03-25
JPS59179B2 JPS59179B2 (en) 1984-01-05

Family

ID=14670360

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53115760A Expired JPS59179B2 (en) 1978-09-22 1978-09-22 Clock monitoring method

Country Status (1)

Country Link
JP (1) JPS59179B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57194685A (en) * 1981-05-26 1982-11-30 Shinko Electric Co Ltd Disturbance detecting system for printed image of video hard copy printer
JPS59114925A (en) * 1982-12-20 1984-07-03 Nec Corp Detecting circuit of input and output fault
JPS63217409A (en) * 1987-03-06 1988-09-09 Ando Electric Co Ltd Detecting circuit for abnormality of received clock
US6163224A (en) * 1998-08-24 2000-12-19 Nec Corporation PLL circuit and method of controlling the same
CN113556201A (en) * 2021-08-03 2021-10-26 中国科学院国家授时中心 Multi-reference clock switching device and method based on beat digital frequency measurement

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57194685A (en) * 1981-05-26 1982-11-30 Shinko Electric Co Ltd Disturbance detecting system for printed image of video hard copy printer
JPS59114925A (en) * 1982-12-20 1984-07-03 Nec Corp Detecting circuit of input and output fault
JPH0318773B2 (en) * 1982-12-20 1991-03-13 Nippon Denki Kk
JPS63217409A (en) * 1987-03-06 1988-09-09 Ando Electric Co Ltd Detecting circuit for abnormality of received clock
US6163224A (en) * 1998-08-24 2000-12-19 Nec Corporation PLL circuit and method of controlling the same
CN113556201A (en) * 2021-08-03 2021-10-26 中国科学院国家授时中心 Multi-reference clock switching device and method based on beat digital frequency measurement

Also Published As

Publication number Publication date
JPS59179B2 (en) 1984-01-05

Similar Documents

Publication Publication Date Title
KR880008487A (en) Clock Control System and Method for Parallel Variable Constant Frequency Power System
JPS55147077A (en) Synchronizing signal generator
JPS57164620A (en) Phase comparator
JPS5542443A (en) Clock supervisory system
JPS5575360A (en) Phase control unit
JPS55130249A (en) Code synchronous system for reception of spectrum diffusion signal
JPS55114006A (en) Synchronous type crystal oscillator
US2751500A (en) Frequency monitoring arrangement
JPS56105524A (en) Phase synchronizing device
JPS5381057A (en) Phase control system of synchronous oscillating circuit
JPS5464956A (en) Pll circuit
JPS55149539A (en) Pll circuit
JPS54139365A (en) Unlock detector circuit for pll synthesizer
SU754652A1 (en) Generator apparatus for geoelectrosurvey
JPS55141869A (en) Phase synchronizing system
SU792594A2 (en) Device for readjusting generator frequency
SU907627A1 (en) Device for dynamic testing of quick-action current protection relays
JPS5651127A (en) Synchronizing circuit
JPS5341194A (en) Output frequency control system for atomic oscillator
JPS5514760A (en) Frequency divider
JPS5735438A (en) Sampling pulse generating circuit
JPS5568742A (en) Phase lock oscillator circuit
JPS54100242A (en) Redundant clock generator circuit
JPS5731236A (en) Frequency converting and amplifying circuit
JPS56104545A (en) Division ratio setting circuit of pll