JPS5528545A - Sample holding circuit - Google Patents

Sample holding circuit

Info

Publication number
JPS5528545A
JPS5528545A JP10108178A JP10108178A JPS5528545A JP S5528545 A JPS5528545 A JP S5528545A JP 10108178 A JP10108178 A JP 10108178A JP 10108178 A JP10108178 A JP 10108178A JP S5528545 A JPS5528545 A JP S5528545A
Authority
JP
Japan
Prior art keywords
amplifiers
featuring
capacity
differential
differential amplifiers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10108178A
Other languages
Japanese (ja)
Other versions
JPS6010398B2 (en
Inventor
Atsushi Shibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP53101081A priority Critical patent/JPS6010398B2/en
Publication of JPS5528545A publication Critical patent/JPS5528545A/en
Publication of JPS6010398B2 publication Critical patent/JPS6010398B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Amplifiers (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE: To ensure the sampling featuring a small attenuation factor and a high accuracy by using two differential amplifiers featuring the single output active load and giving charge/discharge to the holding capacity via the negative feed back to be given to the high-gain amplifier.
CONSTITUTION: The 1st differential amplifiers 43 and 44 featuring the single output active load each are inserted to the output generation points of 2nd differential amplifiers 45 and 62 respectively. The output generation points of amplifiers 43 and 44 possess capacity element 63 for signal holding and are also connected in negative feedback to the 1st differential amplification part via high-input impedance element 46. Then the analog signals are applied to the input teminals of amplifiers 43 and 44, and the signals held by capacity 63 are delivered via element 46.
COPYRIGHT: (C)1980,JPO&Japio
JP53101081A 1978-08-18 1978-08-18 sample hold circuit Expired JPS6010398B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53101081A JPS6010398B2 (en) 1978-08-18 1978-08-18 sample hold circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53101081A JPS6010398B2 (en) 1978-08-18 1978-08-18 sample hold circuit

Publications (2)

Publication Number Publication Date
JPS5528545A true JPS5528545A (en) 1980-02-29
JPS6010398B2 JPS6010398B2 (en) 1985-03-16

Family

ID=14291141

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53101081A Expired JPS6010398B2 (en) 1978-08-18 1978-08-18 sample hold circuit

Country Status (1)

Country Link
JP (1) JPS6010398B2 (en)

Also Published As

Publication number Publication date
JPS6010398B2 (en) 1985-03-16

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