JPS55153376A - Vertical type unipolar transistor - Google Patents

Vertical type unipolar transistor

Info

Publication number
JPS55153376A
JPS55153376A JP6115179A JP6115179A JPS55153376A JP S55153376 A JPS55153376 A JP S55153376A JP 6115179 A JP6115179 A JP 6115179A JP 6115179 A JP6115179 A JP 6115179A JP S55153376 A JPS55153376 A JP S55153376A
Authority
JP
Japan
Prior art keywords
diffusion layer
serving
gate
current flowing
grooves
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6115179A
Other languages
Japanese (ja)
Other versions
JPS6353704B2 (en
Inventor
Junichi Nishizawa
Kenji Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Research Foundation
Original Assignee
Semiconductor Research Foundation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Research Foundation filed Critical Semiconductor Research Foundation
Priority to JP6115179A priority Critical patent/JPS55153376A/en
Publication of JPS55153376A publication Critical patent/JPS55153376A/en
Publication of JPS6353704B2 publication Critical patent/JPS6353704B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/7722—Field effect transistors using static field induced regions, e.g. SIT, PBT

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To prevent the lowering of property in the low current area by cutting the current flowing over the surface of the Step Cut type SIT while the channel of the current flowing horizontally by means of the floating gate, the cut, the oxide insulator and the like. CONSTITUTION:Cut sections are provided on the surface of a semiconductor 1, having grooves parallel with each other. An n<+> diffusion layer 5 serving as the source region is provided on the surface between the grooves while a p<+> diffusion layer 3 serving as the gate region is provided in the grooves. A floating gate 11 is arranged between the FET diffusion layer 5 of the Step Cut construction and the insulator 7 made of oxide film or the like to limit the horizontal length of the channel area whereby the current flowing over the surface is checked. The gate 11 separated from the diffusion layer 3 prevents any increase in the capacity due to the larger area of the diffusion layer 3 serving as the gate region.
JP6115179A 1979-05-17 1979-05-17 Vertical type unipolar transistor Granted JPS55153376A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6115179A JPS55153376A (en) 1979-05-17 1979-05-17 Vertical type unipolar transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6115179A JPS55153376A (en) 1979-05-17 1979-05-17 Vertical type unipolar transistor

Publications (2)

Publication Number Publication Date
JPS55153376A true JPS55153376A (en) 1980-11-29
JPS6353704B2 JPS6353704B2 (en) 1988-10-25

Family

ID=13162821

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6115179A Granted JPS55153376A (en) 1979-05-17 1979-05-17 Vertical type unipolar transistor

Country Status (1)

Country Link
JP (1) JPS55153376A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5343483A (en) * 1976-10-01 1978-04-19 Handotai Kenkyu Shinkokai Semiconductor device
JPS5368178A (en) * 1976-11-30 1978-06-17 Handotai Kenkyu Shinkokai Fet transistor
JPS542678A (en) * 1977-06-08 1979-01-10 Toshiba Corp Longitudinal junction field effect transistor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5343483A (en) * 1976-10-01 1978-04-19 Handotai Kenkyu Shinkokai Semiconductor device
JPS5368178A (en) * 1976-11-30 1978-06-17 Handotai Kenkyu Shinkokai Fet transistor
JPS542678A (en) * 1977-06-08 1979-01-10 Toshiba Corp Longitudinal junction field effect transistor

Also Published As

Publication number Publication date
JPS6353704B2 (en) 1988-10-25

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